Abstract: A system for processing data flows comprises a classifier, a first processor, a first checking unit, a calculator, and a second processor. The classifier is designed for classifying of data channels into a first and a second class of data channels. The first processor is designed for processing of a second sub-class of data channels. The calculator is designed for calculating information for the second class data channels from processing results of the first processor. The second processor is designed for processing the second class data channels using information calculated by the calculator. Each of network equipment for an uplink connection, and of user equipment for a downlink connection or batch processing of format detection comprises such a system for processing data flows.

Abstract: A system for testing an error detection circuit includes a fault injection unit for operating the error detection circuit in a fault injection mode. A fault is inserted in either of a primary or a redundant processor. Output signals generated by the primary and redundant processors are compared and checked for a mismatch and the error detection circuit outputs a test signal based on the comparison result.

Abstract: An overcurrent protection device comprises a maximum-allowed-current unit and a power switch. The maximum-allowed-current unit determines a maximum allowed current in real-time. The maximum allowed current is determined at least partially on an instantaneous level of a load voltage. The load voltage is a voltage across a load to be powered. The power switch is connectable with a switch input to a voltage supply and with a switch output to the load, for providing power to said load. The power switch has a conductive state and a nonconductive state, and is arranged to assume the nonconductive state in response to an indication that a current through the power switch is exceeding the maximum allowed current. A method of operating a power switch is also described.

Abstract: A system and method are provided for automatic dose-correction recipe generation, the system including a dose-correction recipe generator, a reticle data unit in signal communication with the recipe generator, a slit data unit in signal communication with the recipe generator, a process data unit in signal communication with the recipe generator, a wafer data unit in signal communication with the recipe generator, a control unit in signal communication with the recipe generator, and an output unit or a storage unit in signal communication with the control unit; and the method including receiving a current reticle data set and a previous reticle data set, receiving a current slit data set and a previous slit data set, receiving a process condition, receiving a wafer condition, automatically generating a dose-correction recipe in accordance with the received reticle, slit, process and wafer information, and controlling a dose in accordance with the generated recipe.

Abstract: A radio frequency transceiver (102), including a transmitter (104), a duplexer (108) and a direct-conversion receiver (106) including a mixer (140 and 141). An IIP2 calibration system (170), coupled to the transceiver, includes an IIP2 coefficient estimator (172) for calculating an estimate of second-order distortion intermodulation distortion, and an IIP2 controller (174) for adjusting an IIP2 tuning port of the mixer in the receiver to minimize second-order distortion intermodulation distortion in the receiver that may be caused by the receiver receiving a transmit RF signal leaking through the duplexer.

Abstract: Apparatus and method for bus matching. The method includes: receiving data transfer characteristics at a first endian mode and at a second endian mode; determining a connectivity of multiple devices to an interfacing bus in response to the data transfer characteristics and in response to a relationship between a width of the interfacing bus and a width of each device interface; wherein at least one device interface is connected in parallel to multiple interfacing bus portions; and configuring a control logic such as to provide control signals representative of a transfer of data over the interfacing bus; whereas the control logic is configured in response to the connectivity.

Abstract: A system and method are provided for automatic dose-correction recipe generation, the system including a dose-correction recipe generator, a reticle data unit in signal communication with the recipe generator, a slit data unit in signal communication with the recipe generator, a process data unit in signal communication with the recipe generator, a wafer data unit in signal communication with the recipe generator, a control unit in signal communication with the recipe generator, and an output unit or a storage unit in signal communication with the control unit; and the method including receiving a current reticle data set and a previous reticle data set, receiving a current slit data set and a previous slit data set, receiving a process condition, receiving a wafer condition, automatically generating a dose-correction recipe in accordance with the received reticle, slit, process and wafer information, and controlling a dose in accordance with the generated recipe.

Abstract: A device and a method for evaluating ESD protection capabilities of an integrated circuit, the method includes: connecting multiple test probe to multiple integrated circuit testing points. The method is characterized by repeating the stages of: (i) charging a discharge capacitor to an ESD protection circuit triggering voltage level; (ii) connecting the discharge capacitor to the integrated circuit during a testing period such as to cause the discharge capacitor to interact with the integrated circuit; (iii) measuring at least one signal of the integrated circuit, during at least a portion of the testing period; and (iv) determining at least one ESD protection characteristic of the integrated circuit in response to the at least one signal.

Abstract: A method for generating an embedded resistor in a semiconductor device and related computer-readable storage medium are provided, the method and program steps of the medium including forming a shallow trench isolation (STI) region in a substrate; forming a pad oxide on the STI region and substrate; depositing a silicon layer on the pad oxide; forming a photo-resist mask on a portion of the silicon layer disposed substantially above the STI region.

Abstract: A method of converting a plurality of input signals on first and second converters, such that the first and second converters are both used when the plurality of signals comprises two signals, characterised in that said method comprises: selecting more than two input signals; determining the type of each selected signal; combining any signals having the same type to form a combined signal; converting one type of signal with the first converter; converting a second type of signal with the second converter wherein the first or second type signals is a combined signal.

Abstract: A power-on reset (“POR”) methodology and circuit for an electronic circuit using multiple supply voltage domains asserts a reset signal upon ramp up of the first supply voltage signal, maintains the reset signal until all of the supply voltage signals have ramped up, and de-asserts the reset signal after all of the supply voltage signals have ramped up. Practical embodiments of the POR circuit include a control circuit that reduces static and/or dynamic current leakage associated with the operation of the POR circuit.

Abstract: A system and method are provided for authenticating a new device in a wireless network using an authentication device. First, the new device estimates the distance between the new device and the authenticating device as a first distance measurement, and sends the first distance measurement to the authentication device. The authentication device then estimates the distance between the new device and the authenticating device as a second distance measurement. The authentication device then evaluates the first and second distance measurements to determine if they meet authentication criteria and sends authentication data to the new device only if the first and second distance measurements meet the authentication criteria. These criteria can be that they do not differ by more than a set error value or that they both are below a set maximum value.

Abstract: A monocycle forming network may include a monocycle generator, up and down pulse generators, data modulators and clock generation circuits. The network may generate monocycle pulses having very narrow pulse widths, approximately 80 picoseconds peak to peak. The monocycles may be modulated to carry data in ultra-wideband communication systems.