Patents Assigned to FREESCALE SEMICONDUCTROR, INC
  • Publication number: 20100109707
    Abstract: A clock gating cell for gating clock signals includes a latch circuit, a comparison logic circuit, a first logic circuit, and a second logic circuit. An input signal is provided to the latch circuit. An input clock signal is provided to the first logic circuit. The first logic circuit switches the input clock signal based on a comparison signal generated by the comparison logic circuit, thereby generating a latch clock signal. The latch clock signal switches between a first state and a second state only when the input signal switches between the first state and the second state, thereby preventing power loss of the clock gating cell.
    Type: Application
    Filed: July 14, 2009
    Publication date: May 6, 2010
    Applicant: FREESCALE SEMICONDUCTROR, INC
    Inventors: Anubhav SRIVASTAVA, Abhishek Mahajan, Neha Srivastava