Abstract: A multi-region (81, 83) lateral-diffused-metal-oxide-semiconductor (LDMOS) device (40) has a semiconductor-on-insulator (SOI) support structure (21) on or over which are formed a substantially symmetrical, laterally internal, first LDMOS region (81) and a substantially asymmetric, laterally edge-proximate, second LDMOS region (83). A deep-trench isolation (DTI) wall (60) substantially laterally terminates the laterally edge-proximate second LDMOS region (83). Electric field enhancement and lower source-drain breakdown voltages (BVDSS) exhibited by the laterally edge-proximate second LDMOS region (83) associated with the DTI wall (60) are avoided by providing a doped SC buried layer region (86) in the SOI support structure (21) proximate the DTI wall (60), underlying a portion of the laterally edge-proximate second LDMOS region (83) and of opposite conductivity type than a drain region (31) of the laterally edge-proximate second LDMOS region (83).
Type:
Grant
Filed:
June 29, 2012
Date of Patent:
January 5, 2016
Assignee:
FREESCAL SEMICONDUCTOR INC.
Inventors:
Hongning Yang, Daniel J. Blomberg, Jiang-Kai Zuo
Abstract: A data communication network. The network includes a transmitter unit for transmitting data and a receiver unit for receiving data from the transmitter unit. The network has two or more data channels via which data may be transmitted by the transmitter unit to the receiver unit. The receiver unit includes a receiver channel selection unit for selecting a reception channel from the at least two data channels. The receiver channel selection unit operates independent from a selection of a transmission channel by a transmission channel selection unit in the transmitter unit. The transmission channel selection unit is arranged to select a transmission channel from the at least two data channels to transmit data to the receiver unit.