Abstract: A semiconductor module includes a semiconductor device having a gate runner extending in a first direction at an upper surface of the semiconductor device, and a metal wiring plate having a first bonding portion with a bonding surface to which the upper surface of the semiconductor device is bonded via a first bonding material. The first bonding portion has a plurality of first protrusions at the bonding surface. Each first protrusion protrudes toward the semiconductor device, and is provided in a position away from the gate runner by a first distance in a plan view of the semiconductor module.

Abstract: A type, size, and location of a crystal defect of an epitaxial layer of a semiconductor wafer containing silicon carbide are detected from a PL image by crystal defect inspection equipment. Detected crystal defects include a triangular polymorph stacking fault generated in the epitaxial layer during epitaxial growth and high-density BPDs extending from the stacking fault and present bundled between the stacking fault and a perfect crystal. Next, a chip region free of the triangular polymorph stacking fault and free of the high-density BPD in a specified area that is in the termination region and is located closer to a chip center than is a specified position is identified as a conforming product. A semiconductor chip set as a conforming product may contain high-density BPDs outside the specified area.

Abstract: A silicon carbide semiconductor device has a silicon carbide semiconductor substrate of a first conductivity type, a first semiconductor layer of the first conductivity type, a second semiconductor layer of a second conductivity type, first semiconductor regions of the first conductivity type, second semiconductor regions of the second conductivity type, a gate insulating film, gate electrodes, first electrodes, a second electrode, and a gate pad portion configured by a gate electrode pad and a connecting portion. The second semiconductor layer includes a first region facing the connecting portion and a second region facing a corner portion of the gate electrode pad, and the first and second regions are free of the second semiconductor regions. The oxide film is provided on surfaces of the second semiconductor regions and the first and second regions, and the oxide film and the gate insulating film are made of a same material.

Abstract: A power conversion device including a semiconductor switching element having a control electrode terminal and two main electrode terminals and configured to control a current flowing between the two main electrodes by a drive signal applied to the control electrode terminal; and a drive circuit configured to generate the drive signal in synchronization with an input signal and to turn on/off the semiconductor switching element by the drive signal. The drive circuit is configured to detect the current flowing between the two main electrode terminals of the semiconductor switching element at a timing at which the semiconductor switching element is turned off, and to adjust a drive capacity.

Abstract: A semiconductor device includes a substrate with one side and another side in a first direction parallel to a surface thereof and including a semiconductor element provided thereon, and first and second main terminals located at the one side of the substrate, side by side a second direction parallel to the surface of the substrate and orthogonal to the first direction. The first and second main terminals respectively include first and second external connection portions respectively connected to separate external conductors, and respectively include first and second narrow portions connected to the substrate. In the second direction, widths of the first and second narrow portions are respectively less than widths of the first and second external connection portions. Centers of the first and second narrow portions are located closer respectively to the second and first main terminals than are centers of the first and second external connection portions.

Abstract: A silicon carbide semiconductor device has a silicon carbide semiconductor substrate of a first conductivity type, a first semiconductor layer of the first conductivity type and having a doping concentration lower than a doping concentration of the silicon carbide semiconductor substrate, a second semiconductor layer of a second conductivity type, first semiconductor regions of the first conductivity type, trenches, first base regions, second base regions of the second conductivity type, and a co-doped region doped with aluminum and nitrogen. The co-doped region is provided in the first semiconductor layer, including regions between the first base regions and the second base regions and a layer that is closer to the silicon carbide semiconductor substrate than are the first base regions and the second base regions. The co-doped region has a carrier lifetime of not more than 0.01 ?s.

Abstract: A semiconductor device in which even when cracks occur in a sealing material, the entry of moisture through the cracks can be prevented. A semiconductor device comprising a semiconductor element 11 mounted on a laminated substrate 12 and an electrically conductive connecting member, and a sealing material which seals the semiconductor element and the electrically conductive connecting member, wherein the sealing material includes a sealing layer 20 sealing members to be sealed including the laminated substrate 12, the semiconductor element 11, and the electrically conductive connecting member and including a thermosetting resin, and a protective layer 21 coating the sealing layer and including a silicone rubber, and wherein a value A1 of a tensile strength × elongation at break of the sealing layer 20 is less than a value A2 of a tensile strength × elongation at break of the protective layer 21, and the A2 is 1600 MPa or less.

Abstract: A semiconductor device having a semiconductor chip and a control circuit. The semiconductor chip has a gate electrode pad connected to the gate of an output element and the gate of a current monitor element, a sense emitter electrode pad connected to the sense emitter of the current monitor element and to the anode of the temperature detection diode via a current limiting element, and a cathode electrode pad that is connected to the cathode of the temperature detection diode, the cathode being grounded without being connected to the emitter of the output element. In a temperature detection mode, the control circuit receives a temperature detection voltage via the sense emitter electrode pad and detects the temperature state of the output element. In a current detection mode, the control circuit receives a sense current via the sense emitter electrode pad and detects the current state of the output element.

Abstract: Semiconductor device including first semiconductor layer of a first conductivity type, second semiconductor layer of a second conductivity type at a surface of the first semiconductor layer, third semiconductor layer of the first conductivity type selectively provided at a surface of the second layer, and gate electrode embedded in a trench via a gate insulating film. The trench penetrates the second and third layers, and reaches the first layer. A thermal oxide film on the third layer has a thickness less than that of the gate insulating film. Also are an interlayer insulating film on the thermal oxide film, barrier metal on an inner surface of a contact hole selectively opened in the thermal oxide film and the interlayer insulating film, metal plug embedded in the contact hole on the barrier metal, and electrode electrically connected to the second and third layers via the barrier metal and the metal plug.

Abstract: A semiconductor module includes a cooling device that includes: a ceiling plate; a side wall; a bottom plate; a plurality of pin fins having a polygonal shape and arranged in a matrix form in which one end of the respective pin fins is connected to a fin region having a rectangular shape; an inlet for a coolant at a first position adjacent to a part of one of long sides of the fin region, and an outlet for the coolant at a second position adjacent to a part of the other long side of the fin region. The matrix directions of the respective pin fins make an angle with a straight line connecting the first position and the second position, and a length of a segment of the straight line passing across the fin region is longer than a length of short sides of the fin region.

Abstract: A power supply circuit includes: an input terminal that receives an input voltage; an inductor; a switching circuit electrically connected to the inductor and configured to switch between a storing period for storing energy in the inductor and a discharge period for discharging the energy stored in the inductor; an output terminal that receives a current from the inductor in the storing and discharging periods; a transistor electrically connected to the inductor and serving as a portion of a path of a current flowing to the inductor in the storing and discharging periods. The output terminal outputs a voltage based on the storing period, the discharging period, and the input voltage. The transistor stops a switching operation that is used to switch between the storing and discharging periods, by preventing the current flowing to the inductor, in a signal processing period in which a signal processing circuit is processing a signal.

Abstract: A superjunction silicon carbide semiconductor device has a silicon carbide semiconductor substrate, a first semiconductor layer of the first conductivity type, a parallel pn region with first column regions of the first conductivity type and second column regions of a second conductivity type disposed therein repeatedly alternating with one another, a second semiconductor layer of the first conductivity type, a third semiconductor layer of the second conductivity type, a first semiconductor region of the first conductivity type, trenches, a second semiconductor region of the second conductivity type, a third semiconductor region of the second conductivity type, gate electrodes, and an electrode. The first column regions and the second column regions contain phosphorus as a dopant.

Abstract: A sleeve is disposed on a conductive layer of an insulated circuit substrate of a semiconductor device, and includes a cylindrical portion with a through hole and a flange provided at an one end of the cylindrical portion. The flange includes a plurality of protrusions and a plurality of recesses that each extend a radial direction of the cylindrical portion from the opening edge of the through hole to an outer circumferential periphery of the flange, and are disposed alternate with one another in a circumferential direction of the flange. Each protrusion has a top surface and each recess has a bottom surface that are continuous with the opening edge of the through hole so as to each have a single flat surface parallel to the radial direction.

Abstract: Provided is a semiconductor apparatus including: a first peak of a hydrogen chemical concentration disposed on the lower surface side of the semiconductor substrate; and a flat portion disposed on the upper surface side of the semiconductor substrate with respect to the first peak, containing a hydrogen donor, and having a substantially (almost) flat donor concentration distribution in a depth direction. An oxygen contribution ratio indicating a ratio of an oxygen chemical concentration contributing to generation of the hydrogen donor in the oxygen chemical concentration of the oxygen ranges from 1×10?5 to 7×10?4. A concentration of the oxygen contributing to generation of the hydrogen donor in the flat portion is lower than the hydrogen chemical concentration. A hydrogen donor concentration in the flat portion ranges from 2×1012/cm3 to 5×1014/cm3.

Abstract: A semiconductor device capable of suppressing forward voltage degradation and loss during turn-on. A vertical MOSFET includes a semiconductor substrate of a first conductivity type, a first semiconductor layer of the first conductivity type, a second semiconductor layer of a second conductivity type, first semiconductor regions of the first conductivity type, second semiconductor regions of the second conductivity type, third semiconductor regions of the second conductivity type, first trenches and second trenches, gate electrodes provided in the first trenches via a gate insulating film, and Schottky metal provided in the second trenches. In a region between an active region through which current flows during an on-state and an edge region that surrounds a periphery of the active region and sustains a breakdown voltage, sidewalls of the second trenches are apart from the second semiconductor regions and the third semiconductor regions.

Abstract: A method for manufacturing a semiconductor device includes: forming a trimming element inside or over a semiconductor substrate; forming an insulating film on the trimming element; forming, on the insulating film, a first wiring layer connected to one end of the trimming element via a first contact region penetrating the insulating film; forming, on the insulating film, a second wiring layer connected to another end of the trimming element via a second contact region penetrating the insulating film; trimming the trimming element; and examining an insulated state between the semiconductor substrate and either the first wiring layer or the second wiring layer after the trimming.

Abstract: A monitoring apparatus includes a sensing circuitry configured to sense a locked or released state of a door of a railway vehicle, or sense an open or closed state of the door, and a processor. The processor acquires an output of the sensing circuitry, and position information in an opening or closing direction of the door, and determines an abnormality in a configuration related to an opening or closing operation of the door, based on a match between the acquired output of the sensing circuitry and the position information.

Abstract: A method of manufacturing a semiconductor device includes forming a surface structure having a MOS structure in a semiconductor substrate; forming an interlayer insulating partially covering the surface structure; forming an aluminum alloy film in contact with the surface structure and covering an entire area where the surface structure, including the interlayer insulating film, is formed; forming a resist film on the surface of the aluminum alloy film so as to have a thickness that covers the surface of the aluminum alloy while exposing a convex-shaped defect formed at the surface of the aluminum alloy film; patterning the aluminum alloy film using the resist film as a mask; and removing the resist film.

Abstract: Provided is a SiC semiconductor device that enables ohmic contact between the main region and the main electrode and can suppress large surface irregularities in other regions. The SiC semiconductor device includes, an active part and a voltage withstanding structure part and includes a drift layer formed of SiC; a base region formed of SiC and provided on the top face side of the drift layer in the active part; main regions 6a, 6b formed of Sic, provided on the top face side of the base region, and containing a 3C structure in at least the top face portion thereof; a channel stopper region 6c formed of SiC with a 4H structure and provided on the top face side of the drift layer in the voltage withstanding structure part; an insulated gate electrode structure; and an inorganic insulating film 10 provided on the top face of the channel stopper region.