Patents Assigned to Fuji Electric System Co., Ltd.
  • Patent number: 8059437
    Abstract: An integrated circuit, in which the influence of parasitic capacitance between a semiconductor substrate and a resistor and between the semiconductor substrate and a capacitor can be inhibited, and a DC-DC converter provided with the integrated circuit. A shielding layer of an n-type semiconductor is formed between a p-type semiconductor substrate and a resistor formed thereon and between the semiconductor substrate and a capacitor formed thereon. A point BOOT is connected to the shielding layer, at which an electric potential changes in the same way as a change in the reference potential of a functional circuit carrying out a specified operation by using the resistor and the capacitor.
    Type: Grant
    Filed: August 10, 2007
    Date of Patent: November 15, 2011
    Assignee: Fuji Electric Systems Co., Ltd.
    Inventor: Kouhei Yamada
  • Publication number: 20110253189
    Abstract: A thin-film solar cell includes an insulating substrate and multiple unit solar cells. Each unit solar cell includes a photoelectric conversion portion having a first electrode layer, a photoelectric conversion layer, and a second transparent electrode layer, formed on a front surface of the insulating substrate, and a rear electrode layer formed on a rear surface of the insulating substrate. A portion of the first electrode layer of a first unit solar cell, taken from a plan view, overlaps an extending portion of the rear electrode layer of an adjacent second unit solar cell. The first electrode layer of the first unit solar cell is electrically connected to the rear electrode layer of the adjacent second unit solar cells via at least one connection hole passing through the insulating substrate and being connected to the extending portion.
    Type: Application
    Filed: December 23, 2010
    Publication date: October 20, 2011
    Applicant: FUJI ELECTRIC SYSTEMS CO., LTD.
    Inventors: Makoto Shimosawa, Nobuyuki Masuda
  • Publication number: 20110248564
    Abstract: An electric power converting system includes a common DC power supply, and a plurality of inverter sets operated mutually independently to one another, and supplied with electric power from the common DC power supply. Each inverter set has an inverter circuit and a main circuit capacitor. The system further includes a plurality of first and second switching circuits. Each first switching circuit is provided between the common DC power supply and each inverter set, and each second switching circuit is provided in each inverter set for discharging charges in the main circuit capacitor.
    Type: Application
    Filed: March 10, 2011
    Publication date: October 13, 2011
    Applicant: FUJI ELECTRIC SYSTEMS CO., LTD.
    Inventor: Tetsuo Hida
  • Publication number: 20110239649
    Abstract: Provided is a steam characteristics automatic measuring device capable of automatically, ideally also continuously measuring the characteristics of steam taken from a production well, without being affected by interfering components, such as hydrogen sulfide gas and carbon dioxide gas contained in large quantities in steam taken from under the ground, which enables the operator to continuously understand the characteristics of steam and support a smooth operation of a geothermal power plant. The device has a silica monitor for measuring a concentration of silica included in a condensate obtained by cooling steam taken from under the ground; an electrical conductivity meter for automatically measuring the electrical conductivity thereof; a pH meter for automatically measuring the pH value thereof; and a data processing transmitter for automatically transmitting data measured by each of the monitor and meters.
    Type: Application
    Filed: October 2, 2009
    Publication date: October 6, 2011
    Applicants: FUJI ELECTRIC SYSTEMS CO., LTD., GEOTHERMAL ENGINEERING CO., LTD., NIKKISO CO., LTD.
    Inventors: Ichiro Myougan, Yasuyuki Hishi, Toshiaki Aoki
  • Publication number: 20110244381
    Abstract: Provided is an electrophotographic photoconductor that has good coating solution stability and metal oxide dispersibility, is free of image defects including ground fogging and black spots, and affords good image characteristics in various environments, as well as a manufacturing method therefore and a device including the same. The electrophotographic photoconductor includes a conductive substrate; an undercoat layer; and a photosensitive layer. The undercoat layer contains, as a main component, a resin obtained by polymerizing, as starting materials, an aromatic dicarboxylic acid, at least one aliphatic dicarboxylic acid having 8 or more carbon atoms, and at least one diamine having a cycloalkane structure, and further contains a metal oxide. The aromatic dicarboxylic acid in the resin is present in an amount that ranges from 0.1 to 10 mol %, and the resin has an acid value and a base value that are each no greater than 10 KOH mg/g.
    Type: Application
    Filed: December 14, 2009
    Publication date: October 6, 2011
    Applicant: FUJI ELECTRIC SYSTEMS CO., LTD.
    Inventors: Shinjirou Suzuki, Yoichi Nakamura, Ikuo Takaki, Seizo Kitagawa, Kazuki Nebashi
  • Patent number: 8031041
    Abstract: An object of the invention is to provide a micro power converter of a step-up and step-down type without requiring more than two semiconductor switches, without increasing the size of a semiconductor chip, and without degrading efficiency. A micro power converter comprises a micro transformer composed of a planar transformer having a structure including a conductor wound on and through a planar magnetic core, and a semiconductor chip including semiconductor switches S1, S2, and a control circuit for controlling the switches. By constructing a flyback transformer using a micro transformer composed of a planar transformer, a micro power converter of a step-up and step-down type is provided having two semiconductor switches and an overall size comparable to a conventional micro power converter.
    Type: Grant
    Filed: December 1, 2008
    Date of Patent: October 4, 2011
    Assignee: Fuji Electric Systems Co., Ltd.
    Inventor: Satoshi Sugahara
  • Patent number: 8030749
    Abstract: A semiconductor device includes a resin case, a plurality of external connection terminals fixedly provided on the resin case, and at least one semiconductor element provided in the resin case. At least one terminal block has at least one wiring terminal for electrically connecting the semiconductor element and the external connection terminals.
    Type: Grant
    Filed: November 20, 2008
    Date of Patent: October 4, 2011
    Assignee: Fuji Electric Systems Co., Ltd.
    Inventors: Shin Soyano, Katsumichi Ueyanagi
  • Publication number: 20110233714
    Abstract: Aspects of the invention are related to a semiconductor device including a first conductivity type n-type drift layer, a second conductivity type VLD region which is formed on a chip inner circumferential side of a termination structure region provided on one principal surface of the n-type drift layer and which is higher in concentration than the n-type drift layer, and a second conductivity type first clip layer which is formed on a chip outer circumferential side of the VLD region so as to be separated from the VLD region and which is higher in concentration than the n-type drift layer. The invention can also include a first conductivity type channel stopper layer which is formed on a chip outer circumferential side of the first clip layer so as to be separated from the first clip layer and which is higher in concentration than the n-type drift layer.
    Type: Application
    Filed: March 23, 2011
    Publication date: September 29, 2011
    Applicant: FUJI ELECTRIC SYSTEMS CO. LTD.
    Inventor: Hong-fei LU
  • Patent number: 8026566
    Abstract: A semiconductor device includes a first metal foil, an insulating sheet mounted on an upper surface of the first metal foil main, at least one second metal foil mounted on the insulating sheet, at least one solder layer mounted on the at least one second metal foil, and at least one semiconductor element mounted on the at least one second metal foil through the at least one solder layer. The at least one semiconductor has a thickness of 50 ?m or greater and less than 100 ?m.
    Type: Grant
    Filed: April 28, 2008
    Date of Patent: September 27, 2011
    Assignee: Fuji Electric Systems Co., Ltd.
    Inventors: Masafumi Horio, Yoshinari Ikeda, Eiji Mochizuki
  • Publication number: 20110228575
    Abstract: A switching power supply has a start-up circuit that includes a field effect transistor (JFET), which has a gate region (a p-type well region) formed in a surface layer of a p-type substrate and a drift region (a first n-type well region). A plurality of source regions (second n-type well regions) are formed circumferentially around the drift region. A drain region (a third n-type well region) is formed centrally of the source region. The drain region and the source regions can be formed at the same time. A metal wiring of the source electrode wiring connected to source regions is divided into at least two groups to form at least two junction field effect transistors.
    Type: Application
    Filed: March 22, 2011
    Publication date: September 22, 2011
    Applicant: FUJI ELECTRIC SYSTEMS CO., LTD.
    Inventors: Masaru SAITO, Koji SONOBE
  • Patent number: 8018311
    Abstract: A microminiature power converter includes a semiconductor substrate on which a semiconductor integrated circuit is formed, and a thin magnetic induction element. The magnetic induction element includes a magnetic insulating substrate having first and second principal planes and a plurality of through-holes. A coil is formed on a central region of the magnetic insulating substrate, and electrodes are formed on the first and second principal planes at peripheral regions of the magnetic insulating substrate, and electrically connected to the magnetic insulating substrate via respective through-holes. Wiring is formed on the first principal plane in the central region of the magnetic insulating substrate and connected to a capacitor. One end of the wiring is connected to one of the electrode electrodes, and an insulator layer is provided between the wiring and the coil.
    Type: Grant
    Filed: January 10, 2008
    Date of Patent: September 13, 2011
    Assignee: Fuji Electric Systems Co., Ltd
    Inventors: Masaharu Edo, Takayuki Hirose
  • Publication number: 20110215751
    Abstract: An electric power converter includes a control unit outputting a PWM signal, a bridge circuit producing AC electric power supplied to a motor by turning semiconductor switching devices in the bridge on and off in response to PWM signals, a cut off unit cutting the PWM signals off from the bridge circuit in response to a gate signal, and a monitoring unit generating a test signal for checking the cut off unit. The cut off unit includes a switching circuit switching between the test signal and an external cut off signal, and a delay circuit that delays the output of the switching circuit. The arrangement enables the electric power converter to monitor as to whether the cut off unit is abnormal without stopping the operation of the electric power converter.
    Type: Application
    Filed: February 25, 2011
    Publication date: September 8, 2011
    Applicant: FUJI ELECTRIC SYSTEMS CO., LTD.
    Inventor: Ikuya Sato
  • Publication number: 20110215781
    Abstract: A digital control switching regulator of the invention ON/OFF-controls switching elements by digital-controlled pulse width modulation signals and converts an input voltage to a desired output voltage. The switching regulator includes an input voltage detection circuit that includes: a voltage dividing circuit outputting a divided voltage of the input voltage; a comparator section comparing the divided voltage of the input voltage with a first reference voltage and a second reference voltage and outputting a first comparison signal and a second comparison signal indicating comparison results; and a control section controlling a dividing ratio of the voltage dividing circuit based on the first comparison signal and the second comparison signal to obtain the predetermined divided voltage, thereby outputting an input voltage digital signal corresponding to the input voltage. The input voltage digital signal controls controller coefficients for use in the digital control.
    Type: Application
    Filed: March 3, 2011
    Publication date: September 8, 2011
    Applicant: FUJI ELECTRIC SYSTEMS CO. , LTD.
    Inventors: Masahiro SASAKI, Tetsuya KAWASHIMA
  • Publication number: 20110214897
    Abstract: A housing for a waterproof electronic device includes a case with a front opening adapted to receive circuit components therein, and a front cover attached to the case so as to cover the case. The front cover is fitted onto a periphery of the front opening of the case so as to prevent rainwater from entering from outside. The case has an arched top plate, and includes, at a front of the case, a fitting stage, to which the front cover is fitted, so as to protrude from the case along the periphery of the front opening. The fitting stage has right and left side wall sections and at least one drain groove provided along peripheral surfaces of the top plate and both of the right and left side wall sections so that lower ends of the drain groove open downward at a bottom of the case.
    Type: Application
    Filed: March 1, 2011
    Publication date: September 8, 2011
    Applicant: FUJI ELECTRIC SYSTEMS CO., LTD.
    Inventor: Toshihiro Yoshida
  • Patent number: 8014118
    Abstract: A load driving circuit in which a load is connected to the connecting point of transistors as low-side and high-side main switch elements that have a totem pole structure and are connected between a pair of drive voltage supply lines. A protection circuit section is provided for the high-side transistor. In the protection circuit section, a resistor as a voltage control element is provided for a MOSFET as an overvoltage prevention switch and a capacitor is connected between the gate and the drain of the MOSFET.
    Type: Grant
    Filed: February 25, 2008
    Date of Patent: September 6, 2011
    Assignee: Fuji Electric Systems Co., Ltd.
    Inventors: Koji Ikegami, Hideto Kobayashi, Hitoshi Sumida, Hiroshi Shimabukuro
  • Patent number: 8013585
    Abstract: An overcurrent detection circuit (50 in FIG. 1) in a DC-DC converter is connected to a switching control circuit (1), and detects an inductor current flowing through an inductor (L) during the ON control of a switching element (Mn), so as to decide whether the inductor current has decreased down to a prescribed value. The switching control circuit (1) alters the switching timing of a control signal to extend the OFF state of a switching element (Mp) until the decrease of the inductor current to a predetermined magnitude is decided by the overcurrent detection circuit (50). Even when a delay is involved in an overcurrent detection operation, the DC-DC converter is still capable of overcurrent limitation.
    Type: Grant
    Filed: March 19, 2008
    Date of Patent: September 6, 2011
    Assignee: Fuji Electric Systems Co., Ltd.
    Inventor: Kouhei Yamada
  • Publication number: 20110204485
    Abstract: A semiconductor device includes a first semiconductor region of a first conductivity type; a second semiconductor region of a second conductivity type, disposed on a surface of the first semiconductor region, and having an impurity concentration higher than that of the first semiconductor region; a trench that penetrates the second semiconductor region to reach the first semiconductor region; a first electrode disposed inside the trench via an insulating film; a first recess portion disposed deeper than an upper end of the first electrode, in a surface layer of the second semiconductor region, so as to be in contact with the trench; and a second electrode embedded in the first recess portion.
    Type: Application
    Filed: February 15, 2011
    Publication date: August 25, 2011
    Applicants: FUJI ELECTRIC SYSTEMS CO., LTD., DENSO CORPORATION
    Inventors: Seiji Momota, Takeshi Fujii, Satoshi Kamijima, Makoto Asai
  • Publication number: 20110207296
    Abstract: A semiconductor-device fabrication method includes forming a second semiconductor region of a second conductivity on a surface layer of a first semiconductor region of a first conductivity, the second semiconductor region having an impurity concentration higher than the first semiconductor region; forming a trench penetrating the second semiconductor region, to the first semiconductor region; embedding a first electrode inside the trench via an insulating film, at a height lower than a surface of the second semiconductor region; forming an interlayer insulating film inside the trench, covering the first electrode; leaving the interlayer insulating film on only a surface of the first electrode; removing the second semiconductor region such that the surface thereof is positioned lower than an interface between the first electrode and the interlayer insulating film; and forming a second electrode contacting the second semiconductor region and adjacent to the first electrode via the insulating film in the trench.
    Type: Application
    Filed: February 15, 2011
    Publication date: August 25, 2011
    Applicant: FUJI ELECTRIC SYSTEMS CO., LTD.
    Inventor: Seiji Momota
  • Publication number: 20110204437
    Abstract: A semiconductor device having a low on resistance and high integration level with respect to the surface area of a substrate is provided. In the semiconductor device, a first trench, a second trench, and a third trench are provided in an element formation region provided on a semiconductor substrate. Metal is deposited within the first trench and second trench, to form a drain electrode and a source electrode, respectively. Polysilicon is deposited inside the third trench with a gate insulating film intervening, and a gate electrode is formed.
    Type: Application
    Filed: May 2, 2011
    Publication date: August 25, 2011
    Applicant: Fuji Electric Systems Co., Ltd.
    Inventor: Shinichiro MATSUNAGA
  • Publication number: 20110204469
    Abstract: A semiconductor device is provided with a peripheral region that has a narrow width and exhibits good electric field relaxation and high robustness against induced charges. The device has an active region for main current flow and a peripheral region surrounding the active region on a principal surface of a semiconductor substrate of a first conductivity type. The peripheral region has a guard ring of a second conductivity type composed of straight sections and curved sections connecting the straight sections formed in a region of the principal surface surrounding the active region, and a pair of polysilicon field plates in a ring shape formed separately on inner and outer circumferential sides of the guard ring. The surface of the guard ring and the pair of polysilicon field plates of the inner circumferential side and the outer circumferential side are electrically connected with a metal film in the curved section.
    Type: Application
    Filed: February 2, 2011
    Publication date: August 25, 2011
    Applicant: C/O FUJI ELECTRIC SYSTEMS CO., LTD.
    Inventor: Yasuhiko ONISHI