Patents Assigned to Fujitisu Limited
  • Patent number: 9948940
    Abstract: The plurality of encoders respectively transmit encoded information including an encoded image obtained by encoding one image among the plurality of images obtained by partitioning a captured image, and time information corresponding to the one image. At least any one of the plurality of encoders transmits identification information for respectively identifying the plurality of images. A decoding apparatus includes a plurality of decoders. One decoder calculates a playback time for each of a plurality of images based on a scheduled playback time at which a real time according to a scheduled playback time of the plurality of images, which is calculated by each decoder, is later than a real time according to a scheduled playback time of the other images. Encoding with which synchronized partitioned video images can be transmitted in real time in a cost-effective IP network without needing devices such as a conversion device can be performed.
    Type: Grant
    Filed: April 1, 2014
    Date of Patent: April 17, 2018
    Assignee: Fujitisu Limited
    Inventor: Noriyuki Ihara
  • Patent number: 7861080
    Abstract: A packet communication system for effectively using network resources and for improving network operability. A transmission security policy database specifies the omission of header information attached when a transmission packet is capsulated, as a transmission security policy. A header-information omitting section omits the header information of the capsulated transmission packet. A packet transmission processing section adds a security header and a header for tunnel communication to the packet from which the header information has been omitted and transmits the packet. A receiving security policy database specifies that the header information has been omitted, as a receiving security policy. A header-information recovering section searches the receiving security policy database for a security policy for a received packet, and when recognizing that the received packet is a target packet from which the header information has been omitted, recovers the header information.
    Type: Grant
    Filed: February 1, 2007
    Date of Patent: December 28, 2010
    Assignee: Fujitisu Limited
    Inventor: Hiroshi Wakameda
  • Publication number: 20050157419
    Abstract: A plurality of recording media combined integrally having a plurality of recording surfaces; and a plurality sets of reading heads and writing heads, combined integrally, provided for the respective ones of the plurality of recording surfaces, are provided. Upon writing data on each recording medium with the writing head provided therefor, a writing position is controlled as a result of positioning information previously provided on the recording media including the recording medium other than the each recording medium being read with the reading heads provided therefor.
    Type: Application
    Filed: March 15, 2005
    Publication date: July 21, 2005
    Applicant: FUJITISU LIMITED
    Inventor: Yukio Urata
  • Patent number: 6275107
    Abstract: A differential amplifier circuit comprising a pair of input MOS transistors, wherein inputs are supplied to the gates thereof, load circuits are connected to the drains thereof, and a current source is connected to the sources thereof, the current value of the current source is altered in line with variations in the characteristics of the input MOS transistors, thereby suppressing variations in the output level generated at the drain terminals of the input MOS transistors. In other words, unlike a conventional differential amplifier circuit, the current value of the current source is not kept to a uniform value, but rather is altered in accordance with the transistor characteristics generated by the manufacturing process.
    Type: Grant
    Filed: September 17, 1999
    Date of Patent: August 14, 2001
    Assignee: Fujitisu Limited
    Inventors: Junko Maeda, Naoaki Naka
  • Patent number: 6266271
    Abstract: The present invention is a nonvolatile semiconductor memory having, in addition to a main storage region for storing ordinary data, a hidden storage region for storing a special code for preventing unauthorized copying, and this hidden storage region is in a read enabled state at the time of a write protected state, and is in a read prohibited state at a time when there is no write protected state. Therefore, a hidden storage region can be read out only after a semiconductor memory vendor stores a special code in a hidden storage region, and sets the hidden storage region to a write protected state. And the method for changing to this write protected state is a secret to everyone other than the vendor. As a result thereof, even if a semiconductor memory, for which a special code is not stored in a hidden storage region, is illegally obtained on the black market, since hidden storage region readout is still prohibited, illegally copied data cannot be used, consequently preventing unauthorized copying.
    Type: Grant
    Filed: May 18, 2000
    Date of Patent: July 24, 2001
    Assignee: Fujitisu Limited
    Inventor: Shoichi Kawamura