Patents Assigned to Fujitsu and Semiconductor Ltd.
  • Patent number: 6727143
    Abstract: A method and system for insulating a lower layer of a semiconductor device from an upper layer of the semiconductor device is disclosed. The method and system include providing an interlayer dielectric on the lower layer. The method and system further include providing an antireflective coating (ARC) layer. At least a portion of the ARC layer is on the interlayer dielectric. The method and system further include providing a plurality of via holes in the interlayer dielectric and the ARC layer and filling the plurality of via holes with a conductive material. The method and system further include removing the ARC layer while reducing subsequent undesirable charge gain and subsequent undesirable charge loss over the use of a chemical mechanical polish in removing the ARC layer.
    Type: Grant
    Filed: March 22, 2000
    Date of Patent: April 27, 2004
    Assignees: Advanced Micro Devices, Inc., Fujitsu Limited, Fujitsu and Semiconductor Ltd.
    Inventors: Angela T. Hui, Mark T. Ramsbey, Yu Sun, David H. Matsumoto