Abstract: In a technique of a PDP having a four-electrode structure of (X, Y, Z, and A), the technique capable of preventing a delay of a discharge timing due to a voltage applied to the Z electrode is provided. In the four-electrode product structure of (X, Y, Z, and A) and a PDP in which rows are formed at both sides of a Y electrode, for a voltage waveform applied to each electrode (for example, X1, Zo, Y1, Ze, X2, Zo, and Y2) from the drive circuit side, a voltage (Vt) of the narrow width trigger pulse (65) of a positive polarity applied to the Z electrode is configured to be a voltage higher than the voltage (Vs) of the sustain pulses of X and Y (45, 46, 55, and 56).
Abstract: By making the thickness of a dielectric layer thinner than the thickness of each of electrodes, an opposed discharging phenomenon is exerted between the electrodes so that it becomes possible to reduce the discharging voltage between the electrodes. A plasma display panel is provided with a pair of substrates which are aligned face to face with each other with a discharge space placed inside thereof, a plurality of electrodes which are formed on the inner face of one of the substrates in a manner so as to be extended in a fixed direction, with a predetermined thickness, so that by generating a surface discharge, a screen display is carried out, and a dielectric layer which covers the electrodes, and in this structure, the dielectric layer is formed with a thickness which is thinner than the thickness of the electrodes.