Patents Assigned to FUJITSU INTERCONNECT TECHNOLOGIES LIMITED
  • Publication number: 20220322534
    Abstract: A method for manufacturing a circuit board, includes obtaining a second laminated body by laminating, in this order, an uncured second insulating substrate and a resin film on a second surface opposite to a first surface of a cured first insulating substrate of a first laminated body, and performing thermocompression bonding thereon. The first laminated body includes the first insulating substrate and a metal layer that is formed into a pattern shape on the first surface of the first insulating substrate. A third laminated body is obtained by forming a hole that reaches the metal layer, in the resin film, the second insulating substrate, and the first insulating substrate, from a resin film side of the second laminated body, filling conductive paste into the hole, and then peeling off the resin film. Thermocompression bonding is performed by stacking one third laminated body and another third laminated body.
    Type: Application
    Filed: June 3, 2020
    Publication date: October 6, 2022
    Applicant: FUJITSU INTERCONNECT TECHNOLOGIES LIMITED
    Inventors: Shin Hirano, Kenji Iida, Takashi Nakagawa, Kenji Takano
  • Publication number: 20220312595
    Abstract: A substrate that enables increasing an allowable current value of a current path in a thickness direction of the substrate and narrowing spaces between multiple current paths, and the like are provided. To solve this subject, a substrate includes a sheet-shaped first base material (1) having a penetrating hole (1B) in the thickness direction and includes a second base material (2) fitted into the penetrating hole (1B). The second base material (2) includes multiple metal bodies (2B). The metal bodies (2B) penetrate in the thickness direction of the first base material (1) in a state of having an end exposed at each of a first surface and a second surface of the second base material (2) that face each other in the thickness direction.
    Type: Application
    Filed: May 26, 2020
    Publication date: September 29, 2022
    Applicant: FUJITSU INTERCONNECT TECHNOLOGIES LIMITED
    Inventors: Hiroshi Nakano, Norikazu Ozaki
  • Patent number: 11317520
    Abstract: A circuit board includes: an insulating layer; a capacitor which is provided in the insulating layer and which includes a dielectric layer, a first conductor layer provided on a first surface of the dielectric layer and including an opening part, and a second conductor layer provided on a second surface opposite to the first surface of the dielectric layer and including a recess part at a position corresponding to the opening part; and a conductor via provided in the insulating layer, penetrating the dielectric layer, the opening part and the recess part, being in contact with the recess part, and being smaller than the opening part in plan view.
    Type: Grant
    Filed: October 17, 2018
    Date of Patent: April 26, 2022
    Assignee: FUJITSU INTERCONNECT TECHNOLOGIES LIMITED
    Inventors: Masaharu Furuyama, Daisuke Mizutani, Tomoyuki Akahoshi, Masateru Koide, Manabu Watanabe, Seigo Yamawaki, Kei Fukui
  • Publication number: 20220066098
    Abstract: An issue is directed to suppressing light interference occurring between a plurality of waveguides and providing waveguides at high densities. Means for solving the issue includes a plurality of cores (104) each configured to allow light to be transmitted therethrough, a clad (106) surrounding the plurality of cores (104) and smaller in refractive index for light than each of the cores (104), and a transmission suppression member (108) located between mutually adjacent two cores out of the plurality of cores (104) and configured to suppress transmission of light leaking from each of the cores.
    Type: Application
    Filed: May 1, 2020
    Publication date: March 3, 2022
    Applicant: FUJITSU INTERCONNECT TECHNOLOGIES LIMITED
    Inventors: Toshiki Iwai, Taiji Sakai
  • Patent number: 11152291
    Abstract: A multilayer substrate includes a plurality of plates laminated in a thickness direction of the multilayer substrate, a resin layer provided between the plurality of plates adjacent in the thickness direction, an internal conductive layer provided between the plurality of plates adjacent in the thickness direction, and an external conductive layer provided over an outer surface of each plate of the plurality of plates located at both ends in the thickness direction, wherein a total thickness of the internal conductive layer and the external conductive layer is equal to or less than 25% of a total thickness of the plurality of plates.
    Type: Grant
    Filed: October 24, 2019
    Date of Patent: October 19, 2021
    Assignee: FUJITSU INTERCONNECT TECHNOLOGIES LIMITED
    Inventors: Toshiki Iwai, Taiji Sakai
  • Patent number: 11057996
    Abstract: A circuit board includes: a first substrate including a first through hole, a first metal layer formed over an inner wall of the first through hole, and a first conductive composite resin provided on an inner side of the first metal layer of the first through hole; and a second substrate stacked together with the first substrate and including a second through hole that faces the first through hole and has a first open end which is provided on a side of the first through hole and is located on the inner side of the first metal layer, and a second conductive composite resin that is provided in the second through hole and is coupled to the first conductive composite resin.
    Type: Grant
    Filed: June 4, 2019
    Date of Patent: July 6, 2021
    Assignee: FUJITSU INTERCONNECT TECHNOLOGIES LIMITED
    Inventors: Toshiki Iwai, Daisuke Mizutani, Seiki Sakuyama, Taiji Sakai
  • Patent number: 10770386
    Abstract: A wiring board includes: an insulating layer that includes a first surface over which an electronic component is mounted and a second surface opposite to the first surface; a conductive layer that is disposed on the second surface; a via that is provided inside a first through-hole that penetrates a portion between the first surface and the second surface of the insulating layer; an electrode that is disposed on the first surface and connected to the via; and a glass plate that is not contact with the conductive layer and is disposed on the first surface and includes a second through-hole through which the electrode is disposed.
    Type: Grant
    Filed: September 7, 2018
    Date of Patent: September 8, 2020
    Assignee: FUJITSU INTERCONNECT TECHNOLOGIES LIMITED
    Inventors: Toshiki Iwai, Daisuke Mizutani
  • Patent number: 10734316
    Abstract: A wiring board includes: an insulating layer that includes a first surface over which an electronic component is mounted and a second surface opposite to the first surface; a conductive layer that is disposed on the second surface; a via that is provided inside a first through-hole that penetrates a portion between the first surface and the second surface of the insulating layer; an electrode that is disposed on the first surface and connected to the via; and a glass plate that is not contact with the conductive layer and is disposed on the first surface and includes a second through-hole through which the electrode is disposed.
    Type: Grant
    Filed: September 7, 2018
    Date of Patent: August 4, 2020
    Assignee: FUJITSU INTERCONNECT TECHNOLOGIES LIMITED
    Inventors: Toshiki Iwai, Daisuke Mizutani