Patents Assigned to Fujitsu Microelectroncis Limited
  • Patent number: 7545186
    Abstract: A reset circuit includes a power supply detection circuit, a power-down detection circuit, and an output circuit. The power supply detection circuit outputs a first signal when a first voltage according to a power supply voltage is higher than a first threshold and outputting a second signal when the first voltage is lower than the first threshold during power-on and power-down. The power-down detection circuit outputs a third signal when a second voltage according to the power supply voltage becomes lower than a second threshold after the second signal is outputted during power-down. The output circuit outputs a power-on reset signal which changes from low to high when the first signal is outputted during power-on and outputs a power-down reset signal which changes from low to high when the third signal is outputted during power-down.
    Type: Grant
    Filed: November 29, 2004
    Date of Patent: June 9, 2009
    Assignee: Fujitsu Microelectroncis Limited
    Inventors: Hideaki Suzuki, Hirokazu Yamazaki