Abstract: In view of realizing a lithographic process which makes it possible to estimate and correct flare with an extremely high accuracy, and causes only an extremely small dimensional variation in width, over the entire portion not only of a single shot region, but also of a single chip region, a mask pattern correction device of the present invention has a numerical aperture calculation unit calculating, for every single shot region, flare energy for a mask pattern corresponding to a transferred pattern, based on an exposure layout of a plurality of shot regions, or more specifically, while considering flare from a plurality of shot regions located around every single shot region.

Abstract: A method for manufacturing a semiconductor device or a photomask by exposing a pattern while scanning a plurality of deflection regions determined depending on a deflection width of an exposure device on an exposure target with electron beams, enables a computer to execute a step of extracting a first pattern that exists near the boundary of the deflection region and in a first deflection region, a step of searching a second pattern that is adjacent to the first pattern and in a second deflection region different from the first deflection region, and a step of performing data processing of exposure data in accordance with a width of the first pattern so as to minimize the change in distance between the extracted first pattern and the searched second pattern due to positional deviation of the deflection region.

Abstract: Each of a plurality of nonmatching detection circuits is provided for each bit, compares bit output of memory with an expected value corresponding to the bit output, and outputs a nonmatching detection signal when the bit output does not match the value. A selection circuit selects and outputs the output of one or more nonmatching detection circuits in the plurality of nonmatching detection circuits. When the selection circuit outputs at least one nonmatching detection signal, a nonmatching result holding circuit holds the value of the nonmatching detection signal.

Abstract: A semiconductor memory device includes a plurality of N external ports, each of which receives commands, and an internal circuit which performs at least N access operations during a minimum interval of the commands that are input into one of the external ports.

Abstract: In view of realizing a lithographic process which makes it possible to estimate and correct flare with an extremely high accuracy, and causes only an extremely small dimensional variation in width, over the entire portion not only of a single shot region, but also of a single chip region, a mask pattern correction device of the present invention has a numerical aperture calculation unit calculating, for every single shot region, flare energy for a mask pattern corresponding to a transferred pattern, based on an exposure layout of a plurality of shot regions, or more specifically, while considering flare from a plurality of shot regions located around every single shot region.

Abstract: A method and system for insulating a lower layer of a semiconductor device from an upper layer of the semiconductor device is disclosed. The method and system include providing an interlayer dielectric on the lower layer. The method and system further include providing an antireflective coating (ARC) layer. At least a portion of the ARC layer is on the interlayer dielectric. The method and system further include providing a plurality of via holes in the interlayer dielectric and the ARC layer and filling the plurality of via holes with a conductive material. The method and system further include removing the ARC layer while reducing subsequent undesirable charge gain and subsequent undesirable charge loss over the use of a chemical mechanical polish in removing the ARC layer.