Patents Assigned to Fujitsu
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Publication number: 20140208030Abstract: An information processing apparatus including a plurality of mutually connected system boards, wherein each of the system boards includes: a plurality of processors; and a plurality of memories each of which stores data and directory information corresponding to the data, and corresponds to any one of the processors, and wherein each of the plurality of processors, upon receiving a read request for data stored in a memory corresponding to the own processor from another processor, performs an exclusive logical sum operation on identification information included in the read request and identifying the another processor and a check bit included in the directory information and identifying a processor which holds target data of the read request, increments a count value included in the directory information and indicating the number of processors which hold the target data, and sets presence information included in the directory information and indicating a system board which includes the another processor.Type: ApplicationFiled: March 20, 2014Publication date: July 24, 2014Applicant: FUJITSU LIMITEDInventors: Hideki SAKATA, Go SUGIZAKI, Naoya ISHIMURA
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Publication number: 20140204937Abstract: An apparatus is configured to relay communication between first and second nodes that area coupled through a plurality of relay devices. The apparatus generates control information indicating that communication from the second node to the first node is to be performed via the computer, in response to request for migration of relay processing from another apparatus to the apparatus, the relay processing including relaying communication between the first and second nodes, and sends the generated control information to the plurality of relay devices.Type: ApplicationFiled: November 21, 2013Publication date: July 24, 2014Applicant: FUJITSU LIMITEDInventor: Naoki MATSUOKA
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Publication number: 20140208243Abstract: A method provides a user interface for a computer system including providing a formal definition of a structured system configuration including at least one configuration unit having a plurality of configuration parameters; creating at least one configuration module assigned to the configuration unit; linking the configuration module to a configuration entity to retrieve configuration values assigned to the configuration parameters; retrieving configuration values from the configuration entity, and generating a user interface specific to the at least one configuration unit on the basis of at least one generic template for presenting the plurality of configuration parameters associated with the configuration unit and the associated configuration values retrieved for at least one predetermined client.Type: ApplicationFiled: January 23, 2014Publication date: July 24, 2014Applicant: Fujitsu Technology Solutions Intellectual Property GmbHInventor: Steffen Werner
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Publication number: 20140202752Abstract: A wiring board includes a first wiring line and a second wiring line formed on a substrate, a first land and a second land respectively formed at a connection portion of the first wiring line and the second wiring line. A second wiring line has a longer wiring length than the first wiring line. The land is structured with a wiring pattern of a single wiring line. The wiring board also includes a first pad electrode and a second pad electrode respectively formed on the first land and a second land through an insulating film, a first interlayer connection via and a interlayer connection via embedded in the insulating film and electrically connecting the land to the pad electrode. And a wiring length of the wiring pattern of the first land is longer than the wiring length of the wiring pattern of the second land.Type: ApplicationFiled: November 11, 2013Publication date: July 24, 2014Applicant: FUJITSU LIMITEDInventor: Tomoyuki AKAHOSHI
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Publication number: 20140203500Abstract: A conveyer belt is looped on rollers placed over and at both ends of a paper sheet storage part and bill holding members for holding bills are fixed onto an outer surface of the conveyer belt at determined interval. The bill holding members themselves have grip force by which the conveyer belt bends inward and the bills are held. When the bill holding members pass over the roller on a reception side, their free ends get apart from the conveyer belt and the bill holding members receive the bills. The bill holding members grip portions near ends of the bills when passing between rollers. When the bill holding members pass under the roller on a release side, their free ends get apart from the conveyer belt. The bill holding members release the bills, allowing the bills to fall onto stacked bills for staking storage.Type: ApplicationFiled: March 25, 2014Publication date: July 24, 2014Applicant: FUJITSU FRONTECH LIMITEDInventor: Hiroshi Yanagida
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METHOD FOR CARRYING OUT MULTIMEDIA BROADCAST MULTICAST SERVICE, HOME BASE STATION AND USER EQUIPMENT
Publication number: 20140204830Abstract: A method for carrying out a multimedia broadcast multicast service, a home base station, a network management system of the home base station and user equipment. The method includes: acquiring, by a home network side entity, multimedia broadcast multicast service (MBMS) configuration information of a macro cell, the MBMS configuration information of the macro cell comprising first MBMS configuration information, the first MBMS configuration information comprising position information of a multimedia broadcast multicast single frequency network (MBSFN) subframe in the macro cell; and configuring a subframe of a closed subscriber group (CSG) cell at a position which is the same as that of the MBSFN subframe of the macro cell into a first almost blank subframe (ABS) or into a first ABS and MBSFN subframe, according to the acquired first MBMS configuration information, so that the user equipment (UE) is capable of receiving the MBMS of the macro cell.Type: ApplicationFiled: March 26, 2014Publication date: July 24, 2014Applicant: FUJITSU LIMITEDInventors: Weiwei WANG, Ningjuan CHANG, Hua ZHOU -
Publication number: 20140204728Abstract: A node equipment includes a receiver, a processor, a memory and a transmitter. The node equipment is relayed by a plurality of relay devices with a server. The receiver receives a frame from adjacent node equipment. The processor generates a wait number by incrementing a number of hops for each of the relay devices, when the number of hops to the adjacent node equipment is reported with a synchronization request, the number of hops being generated by designating each of the plurality of relay devices as a starting point. The memory stores the wait number in association with an identifier of the relay device. The transmitter transmits a data frame in which the server is designated as an address. The processor outputs to the transmitter a data frame in which a relay device having a relatively small wait number stored in the memory is designated as a relay destination.Type: ApplicationFiled: March 19, 2014Publication date: July 24, 2014Applicant: FUJITSU LIMITEDInventors: Toshitsugu Kobayashi, Yoshinobu Shimokawa, Satoshi Hamanaka, SYOICHI URATA, Kenji MAEDA, YOSHIYUKI JUFUKU, Yasunori Murata, YUZURU SHIMOMURA
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Publication number: 20140206159Abstract: A compound semiconductor device includes: a compound semiconductor multilayer structure; a gate insulating film on the compound semiconductor multilayer structure; and a gate electrode, wherein the gate electrode includes a gate base portion on the gate insulating film and a gate umbrella portion, and a surface of the gate umbrella portion includes a Schottky contact with the compound semiconductor multilayer structure.Type: ApplicationFiled: March 25, 2014Publication date: July 24, 2014Applicant: FUJITSU LIMITEDInventor: Naoko KURAHASHI
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Publication number: 20140204726Abstract: An alarm management apparatus includes a processor. The processor is configured to receive alarms notified upon a plurality of communication apparatuses detecting a failure. The alarms include identification information for identifying types of the respective alarms. Each of the plurality of communication apparatuses is included in one of a plurality of communication networks. The processor is configured to check development situations of respective types of alarms received from each of the plurality of communication networks on basis of the identification information to identify a particular communication network and a particular type of alarms. The processor is configured to cause a first relay apparatus of a plurality of relay apparatuses to discard first alarms of the particular type. The first alarms are notified from a first communication apparatus included in the particular communication network. The first communication apparatus is not adjacent to a development location of the failure.Type: ApplicationFiled: November 25, 2013Publication date: July 24, 2014Applicant: FUJITSU LIMITEDInventor: Hidemasa NAGASAWA
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Publication number: 20140203852Abstract: A jitter monitor includes: a voltage generating circuit configured to generate a first voltage that is varied with time at a predetermined inclination; a voltage reducing circuit configured to reduce the first voltage by a predetermined voltage in synchronization with a first clock signal so as to generate a second voltage that is varied with time at the predetermined inclination in synchronization with the first clock signal; and a sampling circuit configured to sample a portion having the predetermined inclination of the second voltage.Type: ApplicationFiled: October 31, 2013Publication date: July 24, 2014Applicant: FUJITSU LIMITEDInventor: Hirotaka TAMURA
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Publication number: 20140208322Abstract: A computer system includes plural servers in which virtual machines are arranged; plural power supply apparatuses that supply electric power to the servers; and a control apparatus that controls arrangement of the virtual machines in the servers. The control apparatus solves an integer programming problem whose objective function is total power consumption by the servers and by the power supply apparatuses, the total power consumption being described as a function of the arrangement of the virtual machines; and arranges the virtual machines based on a solution of the integer programming problem.Type: ApplicationFiled: March 24, 2014Publication date: July 24, 2014Applicant: FUJITSU LIMITEDInventors: Tomotake Sasaki, Yuichi Sato, Hiroki Kobayashi, Sachio Kobayashi
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Publication number: 20140203291Abstract: A semiconductor device includes: an FET chip; pads provided on an upper surface of the FET chip; bumps provided on at least one of the pads; leads having first portions that are connected to the FET chip by the bumps and extend along the upper surface of the FET chip, and second portions that contact surfaces of the first portions along the upper surface of the FET chip and extend along a side surface of the FET chip, the first and second portions being formed by press or cutting; and a seal layer that seals the FET chip and the leads and a surface from which the second portions of the leads are exposed, the surface of the seal layer being on a lower surface side of the FET chip.Type: ApplicationFiled: December 4, 2013Publication date: July 24, 2014Applicant: FUJITSU SEMICONDUCTOR LIMITEDInventor: Koichi Nakamura
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Publication number: 20140206272Abstract: A container is provided. A rack is provided in the container, and a server is mounted to the rack. A fan unit is provided in the container, and a large-sized fan and first and second small-sized fans of which diameters are smaller than that of the large-sized fan are alternately arranged on an opposing surface of the fan unit opposed to the rack. A CPU temperature sensor measures a temperature of a heat generation component incorporated in the server. A fan operation management unit controls rotation of the large-sized fan and rotation of the first small-sized fan and the second small-sized fan according to the CPU temperature sensor.Type: ApplicationFiled: November 14, 2013Publication date: July 24, 2014Applicant: FUJITSU LIMITEDInventor: Hiroyoshi KODAMA
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Publication number: 20140205193Abstract: An image processing apparatus includes a histogram computation section that for a plurality of images with different light exposure amounts captured, computes for each of the images a histogram of the number of pixels a light exposure amount ratio computation section that, based on a degree of similarity between a profile of a first histogram computed from a first image out of the plurality of images and a profile of a second histogram computed from a second image out of the plurality of images, computes as a light exposure amount ratio a ratio between a light exposure amount for the first image and a light exposure amount for the second image, and a pixel value adjustment section that adjusts the pixel values of pixels contained in one image out of the first image and the second image based on the light exposure amount ratio.Type: ApplicationFiled: November 13, 2013Publication date: July 24, 2014Applicant: FUJITSU SEMICONDUCTOR LIMITEDInventor: Yuji UMEZU
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Publication number: 20140205192Abstract: Image defogging method and system. The method includes: acquiring minimum intensity values corresponding to pixels in a foggy image, and selecting the largest values of intensity values of R, G, and B channels of pixels in an area, covered by a brightest area of a predetermined size in a local minimum intensity image, in the foggy image as component values of R, G, and B channels of an atmosphere light value; acquiring a transformation image of the foggy image with atmosphere light value of the foggy image; acquiring a transmission map of the foggy image by edge-preserving filtering the transformation image; and acquiring intensity values of R, G, and B channels of pixels in a defogged image using transmission map and atmosphere light value of the foggy image and intensity values of R, G, and B channels of pixels in the foggy image.Type: ApplicationFiled: August 28, 2012Publication date: July 24, 2014Applicant: FUJITSU LIMITEDInventor: Bingrong Wang
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Publication number: 20140202922Abstract: A carrier for receiving one or more electronic modules includes a carrier member having one or more receiving receptacles, each of the one or more receiving receptacles being shaped to match an outline shape of an electronic module having at least one corner thereof chamfered.Type: ApplicationFiled: January 15, 2014Publication date: July 24, 2014Applicant: FUJITSU COMPONENT LIMITEDInventor: Tatsushi Shibuya
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Publication number: 20140206158Abstract: A semiconductor device includes: a semiconductor layer disposed above a substrate; an insulating film formed by oxidizing a portion of the semiconductor layer; and an electrode disposed on the insulating film, wherein the insulating film includes gallium oxide, or gallium oxide and indium oxide.Type: ApplicationFiled: March 21, 2014Publication date: July 24, 2014Applicant: FUJITSU LIMITEDInventor: Atsushi YAMADA
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Publication number: 20140207837Abstract: A calculating device selects an action and a corresponding state; acquires an evaluation value by evaluating the combination of the selected action and the selected state; identifies for each selected action, a lowest evaluation value among acquired evaluation values; determines the lowest evaluation value among evaluation values of all the states selected for each action as a minimax candidate, and determines, as a minimax, an evaluation value that is highest among the lowest evaluation values corresponding to the actions; each time an evaluation value is acquired for a combination of a state and an action after the minimax candidate is determined, compares the acquired evaluation value and the minimax candidate, and terminates selection of a state corresponding to the action when the evaluation value is lower than the minimax candidate and selects an unselected action from the action set; and outputs an action corresponding to the determined minimax.Type: ApplicationFiled: March 19, 2014Publication date: July 24, 2014Applicant: FUJITSU LIMITEDInventors: Tsuyoshi Taniguchi, Yoshio Nakao
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Publication number: 20140206357Abstract: A method and apparatus for estimating mobility status of a terminal, including: determining, by the terminal, whether a handover or a cell reselection happens between groups or within a group according to received network topology information; counting, by the terminal, the handover or the cell reselection according to an inter-group size if the handover or the cell reselection happens between groups; counting, by the terminal, the handover or the cell reselection according to an intra-group mobility counting result if the handover or the cell reselection happens within a group; and estimating, by the terminal, the mobility status of the terminal according to a counting result. With the method and apparatus of the embodiments, the precision of the estimation is increased at a relatively low cost of signaling, and the prediction result is more accurate and the applicable scenarios are more wide, but also the air-interface signaling is simple.Type: ApplicationFiled: March 26, 2014Publication date: July 24, 2014Applicant: FUJITSU LIMITEDInventors: Yanling LU, Weiwei WANG, Haibo XU, Ningjuan CHANG
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Publication number: 20140204095Abstract: A search apparatus includes a storage device storing for particle data, positional information and a deformation gradient tensor; and a processor configured to generate based on the positional information, circumscribing shape data that circumscribes an influence region of the particle data; set, as a deformation object, the circumscribing shape data or region data; deform the deformation object by the deformation gradient tensor; judge whether an overlap exists between the deformed deformation object and a deformation-exempt object that is among the circumscribing shape data and the region data, and not set as the deformation object; determine particle data in the region data, as a neighbor particle data candidate of the object particle data, upon judging that an overlap exists between the deformed deformation object and the deformation-exempt object; and store to the storage device, a determination result.Type: ApplicationFiled: March 20, 2014Publication date: July 24, 2014Applicant: FUJITSU LIMITEDInventor: Tamon Suwa