Abstract: A device-configuration-information integrated management system includes a device-configuration-information managing unit that manages device configuration information containing configuration items of a target device for management and contains relationships between the configuration items; and a device-configuration-information integrated managing unit for integratedly managing the device configuration information obtained from a plurality of the device-configuration-information managing units. The system also includes a device-configuration-information optimum arrangement processing unit that performs optimum management by aggregating device configuration information that contains related configuration items, from among the device configuration information managed by a plurality of the device-configuration-information managing units, in a single device-configuration-information managing unit from among a plurality of the device-configuration-information managing units.

Abstract: A voice-quality evaluating system, in a secure network that allows a voice packet to pass, transmits and receives communication information for a voice quality testing between a test management apparatus and a test communication apparatus connected to the network and between the test communication apparatuses, for the voice quality testing between the test communication apparatuses arranged on the network. The voice-quality evaluating system embeds the communication information in a payload of the voice packet, and transmits and receives communication-information-embedded voice packet.

Abstract: There is provided a card connector for electrically coupling a card with a motherboard. The card connector includes a housing to and from which a contact pad of the card is inserted and ejected, where the housing is mountable on the motherboard; a pair of contacts is configured to hold the card between the pair of the contacts and to be electrically coupled with the contact pads of the card inserted into the housing, and extend in a first direction, and a pair of urging members is configured in the housing to force the pair of the contacts toward the card and extend in a second direction opposite to the first direction.

Abstract: A cache memory controller searches a second cache tag memory holding a cache state information indicating whether any of multi-processor cores storing a registered address of information registered within its own first cache memory exists. When a target address coincides with the obtained registered address, the cache memory controller determines whether an invalidation request or a data request to a processor core including a block is necessary based on the cache status information. Once it is determined that invalidation or a data request for the processor including the block, the cache memory controller determines whether a retry of instruction based on a comparison result of the first cache tag memory is necessary, if it is determined that invalidation or a data request for the processor including the block.

Abstract: A recovery method management method includes executing and completing a work on a work target of a system according to a work start command and a work completion command, creating working method information for each work target, acquiring before-work-start system information and after-work-completion system information of the system to create before-and-after-work change information for each work target, storing and managing the working method information and the before-and-after-work change information in a work information managing and storing unit for each work target, creating recovery method information for each similar recovery work target among the work targets on the basis of the working method information, creating before-and-after-recovery change information for each recovery work target on the basis of the before-and-after-work change information, and storing and managing the recovery method information created and the before-and-after-recovery change information created in a recovery method managi

Abstract: It is disclosed a semiconductor device including a silicon substrate, provided with a plurality of cell active regions in a call region, an element isolation groove, formed in a portion, between any two of the plurality of cell active region, of the silicon substrate, a capacitor dielectric film, formed in the element isolation groove, a capacitor upper electrode, formed on the capacitor dielectric film, and configuring a capacitor together with the silicon substrate and the capacitor dielectric film. The semiconductor device is characterized in that a dummy active region is provided next to the cell region in the silicon substrate.

Abstract: This invention relates to an amplifier device and a predistortion control method. The amplifier device comprises a predistortion unit, a predistortion control unit, and an amplifier unit, of which the predistortion control unit controls the predistortion unit in accordance with a signal fed back from the amplifier unit. The predistortion control method comprises determining power of a left side lobe of two side lobes of a frequency spectrum of the signal fed back from the amplifier unit; determining power of a right side lobe of two side lobes of a frequency spectrum of the signal fed back from the amplifier unit; determining a cost function in accordance with the power of the first and right side lobes, and controlling the predistortion unit in accordance with the cost function.

Abstract: A library apparatus includes a housing having an opening, a cell unit including a plurality of cells for storing a storage medium, a drive unit for writing data into or reading data from the storage medium, a medium transportation unit for accessing each of the cells and the drive unit and for transporting the storage medium between the cells and between each of the cells and the drive unit, a cell unit driver for moving the cell unit in vertical direction, and a controller for driving the cell unit driver to move the cell unit through the opening to a position accessible by a medium transportation unit of another library apparatus stacked in vertical direction.

Abstract: An RFID tag includes: a tabular dielectric member 11; an antenna pattern 12 that extends over a top surface and an undersurface of the dielectric member and forms a loop antenna L1 having both ends existing on one surface of the top surface and the undersurface; a circuit chip 13 that is electrically connected to the antenna pattern; a first electrode 14 that is connected directly or via a conductor to one end 12a of the both ends of the loop antenna and spreads on the one surface of the top surface and the undersurface; and a second electrode 15 that is connected via a conductor to the other end 12b of the both ends of the loop antenna and spreads on the other surface of the top surface and the undersurface, along the first electrode 14.

Abstract: There is provided a filter which includes a transmission line, a stub branched from the transmission line, the stub electrically coupled with the transmission line, and a resonator configured to electromagnetically couple with the stub and to resonate at an odd harmonic frequency of a fundamental wave, the fundamental wave propagating through the transmission line.

Abstract: Address information of target data is stored in an ELA register at the start of a cache excluding process performed by BackEviction, and a request processing unit continuously re-executes a data acquiring process while an address of data requested to be acquired by a processor is present in the ELA register. The address information of the target data is stored in an EWB buffer at the start of autonomous move-out performed by a processor, and the cache excluding process performed by BackEviction is stopped when the address of data subjected to BackEviction is present in the EWB buffer.

Abstract: A parallel data output device includes a first latch circuit that latches and outputs one of at least two data signals input in parallel in accordance with a first clock signal; a second latch circuit that latches and outputs another of the at least two data signals in accordance with a second clock signal; and a phase set circuit that shifts at least one of a phase of the first clock signal and a phase of the second clock signal based on the phase of the first clock signal and the phase of the second clock signal.

Abstract: A location information notification method for transmitting location information regarding a communication terminal, the location information notification method includes receiving a signal indicating a request for the communication terminal to provide location information, determining whether a transfer setting for the communication terminal has been performed, and causing a condition restraining transmission of the location information from the communication terminal in response to the received signal when the determining determines the transfer setting has been performed. The transfer setting indicates that communications to the communication terminal are being transferred to another communication terminal.

Abstract: The method of manufacturing a semiconductor device includes forming an insulating film of a silicon compound-group insulation film; forming an opening in the insulation film, applying an active energy beam in an atmosphere containing hydrocarbon gas to form a barrier layer of a crystalline SiC, and forming an interconnection structure of copper in the opening with the barrier layer formed in.

Abstract: An equalizer circuit includes: a plurality of amplifiers that convert a voltage signal into a current; a plurality of capacitive loads that are charged and discharged in accordance with respective outputs of the plurality of amplifiers; a charge discharge circuit provided for each of the plurality of capacitive loads to charge or discharge one of the plurality of capacitive loads; and a reset circuit provided for each of the capacitive loads to initialize the charge stored in the one of the plurality of capacitive loads, wherein a current according to the voltage signal is integrated in different periods for each of the plurality of capacitive loads and the capacitive load is discharged through the current in a first period and the capacitive load is charged through the current in a second period following the first period.

Abstract: An image control apparatus including a color information acquisition unit configured to acquire, from a memory, color information expressing a power saving color, a display image acquisition unit configured to acquire a display image displayed on a display device, a compensation unit configured to compensate the display image acquired by the display image acquisition unit, based on the acquired color information, and a display unit configured to cause the display device to display the compensated display image.

Abstract: An electrolyte composition that shows low methanol cross-over and exhibits high proton conductivity when used as a solid electrolyte for solid polymer fuel cells or the like, and a solid electrolyte membrane and a solid polymer fuel cell that use the electrolyte composition are provided. This electrolyte composition comprises a perfluorocyclobutane-containing polymer having a specific structure. High proton conductivity is provided by sulfonic acid groups connected to the benzene rings. Reduction of methanol crossover is realized by introduction of a rigid structure with aromatic rings, or a combination o a rigid structure with aromatic rings and a three-dimensional cross-linked structure.

Abstract: A clock adjustment circuit delays a phase of a clock signal on the basis of a TAP value so as to output an adjusted clock signal. By synchronizing transmission data with the adjusted clock signal, reception data is generated. A data adjustment circuit delays the transmission data on the basis of a TAP2 value. By synchronizing the delayed transmission data with the adjusted clock signal, adjusted reception data is generated. A data adjustment control circuit generates the TAP2 value on the basis of a result of a comparison between the reception data and the adjusted reception data, and outputs to a clock adjustment control circuit an instruction to update the TAP value.

Abstract: To prevent electrolytic corrosion from occurring by reliably establishing an electrical conduction between a motor output shaft and brackets. A first bracket 51 attached to one end part and a second bracket 52 attached to the other end part are electrically connected to each other via a conductive member 8 embedded in a molding resin part 21 of a stator 2.

Abstract: A data processing apparatus includes, an input unit to accept information on one or more deletion-target data blocks specified from a plurality of data blocks, a hash generating unit to calculate a hash value of each of the plurality of data blocks, an auxiliary data generating unit to calculate auxiliary data ?=gH1(mod N) of a signer based on predetermined values g and N and a product H1 of the hash values of one or more deletion-target data blocks, a digital signature generating unit to calculate intermediate data ?=gH2(mod N) based on the predetermined values g and N and a product H2 of the hash values of one or more remaining data blocks to generate a digital signature for a combination of the intermediate data ? and position data of one or more deletion-target data blocks with a signing key of a modifier.