Patents Assigned to Fujitus Limited
  • Patent number: 9088392
    Abstract: A mobile user terminal, which transmits downlink channel quality information indicating downlink channel quality and an uplink pilot signal to a base station, whereby a carrier frequency used for transmitting the downlink quality information and a carrier frequency used for transmitting the uplink pilot signal are selectable respectively from among a plurality of carrier frequencies assigned to the mobile user terminal; the mobile user terminal includes a radio transmitter, which transmits the downlink quality information and the uplink pilot signal in an intermittent fashion to the base station; and the radio transmitter transmits the downlink quality information and the uplink pilot signal by using a same carrier frequency among the plurality of carrier frequencies or by using adjacent carrier frequencies among the plurality of carrier frequencies, in a period corresponding to a state of intermittent communicate.
    Type: Grant
    Filed: September 20, 2012
    Date of Patent: July 21, 2015
    Assignee: FUJITU LIMITED
    Inventors: Kazuhisa Obuchi, Tetsuya Yano, Shunji Miyazaki, Takao Nakagawa
  • Patent number: 8740454
    Abstract: An optical fiber is provided with a first measurement portion and a second measurement portion provided with covering layers different at least in any one of heat capacity and heat conductivity. Then, the first measurement portion and the second measurement portion are located in the same measurement position and light is inputted from a temperature measurement device into the optical fiber. Thereafter, the temperature measurement device receives backscattered light generated inside the optical fiber to measure temperature distribution in a longitudinal direction of the optical fiber. An analyzer analyzes a variation over time of the temperature distribution outputted from the temperature measurement device to calculate a temperature and a wind velocity in a measurement position where the first measurement portion and the second measurement portion are located.
    Type: Grant
    Filed: August 1, 2012
    Date of Patent: June 3, 2014
    Assignee: Fujitus Limited
    Inventors: Fumio Takei, Kazushi Uno, Takeo Kasajima
  • Patent number: 7532595
    Abstract: A mobile terminal includes a channel estimation processor to obtain the channel estimation value of a first channel reception signal in use of a plurality of known signals received from a base station within a channel estimation period; a channel compensation processor to perform a compensation process of the first channel reception signal in use of the channel estimation value; and a controller to control the channel estimation period so as to use a known signal which is received after the reception of the first channel reception signal for channel compensation. With this, throughput in downlink communication can be improved by controlling the deterioration of HS-SCCH reception quality itself without any particular transmission power control with the base station even under an environment such as high speed fading.
    Type: Grant
    Filed: March 20, 2006
    Date of Patent: May 12, 2009
    Assignee: Fujitus Limited
    Inventor: Keiji Nibe
  • Patent number: 7307782
    Abstract: The present invention relates to a Raman amplifier where flexibility in device design considering both of Raman amplification and dispersion compensation is high. In the Raman amplifier, the Raman amplification optical fiber included in the optical amplification section and the dispersion compensating optical fiber included in the dispersion compensation section are arranged while being optically connected to each other. Since the optical amplification section and the dispersion compensation section are provided as independent optical devices, one device can be designed without being restricted to the design conditions of the other device.
    Type: Grant
    Filed: July 31, 2002
    Date of Patent: December 11, 2007
    Assignees: Sumitomo Electric Industries, Ltd., Fujitu Limited
    Inventors: Tetsufumi Tsuzaki, Motoki Kakui, Takafumi Terahara, Junichi Kumasako
  • Publication number: 20060155521
    Abstract: In a verification supporting apparatus, when an obtaining unit obtains a verification scenario, a substituting unit substitutes an undefined value for a variable value in the verification scenario. A first executing unit executes a logic simulation using an input pattern. From a result of the logic simulation, a determining unit generates code-coverage upper-limit information. A setting unit sets input patterns by giving an arbitrary logic value to the variable value. A second executing unit executes a logic simulation using the input patterns set. A generating unit generates code coverage from the input patterns set. A calculating unit calculates a level of achievement of the code coverage with respect to the code-coverage upper-limit information.
    Type: Application
    Filed: April 28, 2005
    Publication date: July 13, 2006
    Applicant: FUJITUS LIMITED
    Inventor: Hiroaki Iwashita
  • Patent number: 6791744
    Abstract: The present invention relates to a Raman amplification optical fiber and the like comprising a structure which can Raman-amplify signal light including a plurality of wavelength components at a high efficiency and effectively restrain signal waveforms from deteriorating due to influences of nonlinear optical phenomena, while improving the degree of freedom in the design of optical fiber transmission lines and Raman amplifiers. As characteristics at each wavelength of signal light, the Raman amplification optical fiber has a chromatic dispersion with an absolute value of 6 ps/nm/km or more but 20 ps/nm/km or less, and an effective area Aeff of 20 &mgr;m2 or less, preferably less than 15 &mgr;m2. More preferably, as a characteristic at each wavelength of signal light, the Raman amplification optical fiber has a Raman gain coefficient GR/Aeff of 0.005 (W·m)−1 or more.
    Type: Grant
    Filed: March 4, 2002
    Date of Patent: September 14, 2004
    Assignees: Sumitomo Electric Industries, Ltd., Fujitu Limited
    Inventors: Eisuke Sasaoka, Motoki Kakui, Masashi Onishi, Toshiki Tanaka, Takao Naito
  • Publication number: 20030162397
    Abstract: A method for fabricating a semiconductor device that prevents the formation of a side etch caused by fluoride (CFx) produced when a barrier insulating film is etched. As shown in FIG. 1(G), an opening in the shape of a wiring trench is made in an interlayer dielectric. Then, as shown in FIG. 1(H), a barrier insulating film is etched. As a result, fluoride will be produced. By performing plasma etching by the use of gas which contains hydrogen atoms in the following process shown in FIG. 1(I), the fluoride is converted to a highly volatile compound, such as hydrogen fluoride, and is removed.
    Type: Application
    Filed: November 26, 2002
    Publication date: August 28, 2003
    Applicant: FUJITU LIMITED
    Inventor: Kenichi Higuchi
  • Patent number: 6229728
    Abstract: A ferroelectric memory includes memory cells, a pair of bit lines to which the memory cells are connected, and a control circuit which changes a reference cell applied to one of the pair of bit lines while data read from one of the memory cells is output to the other one of the pair of bit lines.
    Type: Grant
    Filed: April 22, 1999
    Date of Patent: May 8, 2001
    Assignee: Fujitu Limited
    Inventors: Chikai Ono, Hirokazu Yamazaki
  • Patent number: 6157335
    Abstract: A voltage generating circuit for a digital to analog converter divides a potential difference between a high potential supply and a low potential supply. The voltage generating circuit includes a voltage dividing circuit having three impedance elements connected in series between the high potential supply and the low potential supply. A first current source is connected to a node between the first two series connected impedance elements and a second current source is connected to a node between the second and third series connected impedance elements. The first and second current source supply first and second currents having the same value to the first and second nodes, respectively. A control circuit compares a reference voltage with a selected voltage output from the voltage dividing circuit and controls the first and second currents supplied by the first and second current source so that the selected voltage is made equal to the reference voltage.
    Type: Grant
    Filed: July 30, 1998
    Date of Patent: December 5, 2000
    Assignee: Fujitus Limited
    Inventors: Hisao Suzuki, Norikazu Fushimi
  • Patent number: 5811782
    Abstract: A binary device suitable for a bar code reader performs a binary signal conversion, without depending on a laser beam scanning rate.
    Type: Grant
    Filed: October 18, 1996
    Date of Patent: September 22, 1998
    Assignee: Fujitu Limited
    Inventors: Shinichi Sato, Isao Iwaguchi, Ichiro Shinoda, Tomoyuki Kashiwazaki
  • Patent number: 5739760
    Abstract: A remote supervisory control system is provided in which a master system performs monitoring and control of a plurality of slave systems, maintaining the fine control capability of the past, while enabling implementation with the minimum memory capacity. The master system is connected, via channels, to a plurality of slave systems, each of which has a plurality of individual control points in its purview. The plurality of individual control points are grouped into groups of individual control points having the same attributes, prescribed operations being performed on the status information of all individual control points within each group, the results of these calculations being taken as the status information of a representative control point. This status information is collected in memories located within the master system.
    Type: Grant
    Filed: November 6, 1995
    Date of Patent: April 14, 1998
    Assignee: Fujitu Limited
    Inventor: Satomi Hatakeyama
  • Patent number: 5650912
    Abstract: A heat sink mounted on a heat producing element for cooling the heat producing element attached on the printed board of the electronic apparatus, having a heat sink body made of a good heat conductive material and a fan assembly installed inside the heat sink body. The heat sink body is efficiently air-cooled by a cooling air generated by the rotation of the fan assembly. The cooling air forcibly cools a base and a fixing wall of the base adjacent to the heat producing element and plate-like radiating fins or a pin-like radiating fins are protruded on the heat sink body to radiate the heat effectively. The position of the fan assembly is at the center of the heat sink body or is at the offset position from the center of the heat sink body. The heat sink of the present invention can be installed in a portable electronic apparatus such as a portable computer.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: July 22, 1997
    Assignees: Fujitu Limited, PFU Limited
    Inventors: Tadashi Katsui, Katsuhiko Nakata, Takeshi Koga, Tadanobu Matsumura, Yoshimi Tanaka, Yasuaki Sugimoto, Takashi Kitahara, Takayuki Horinishi
  • Patent number: 5568479
    Abstract: The present invention relates to a system for controlling a miscellaneous device such as a remote device associated with an exchange which handles a fixed length cell with a control field and an information field. The object of the invention is to offer a system where an exchange can control a miscellaneous device such as a remote device in accordance with the feature of the exchange. The exchange includes a call processor, a switch and a signal device. In order to control the miscellaneous device, a path is formed between the signal device and the miscellaneous device. Control information from the call processor is cellulated. The path notifies the miscellaneous device of the control information including cell via the switch to control the miscellaneous device by the exchange.
    Type: Grant
    Filed: October 10, 1995
    Date of Patent: October 22, 1996
    Assignee: Fujitus Limited
    Inventors: Yoshihiro Watanabe, Satoshi Kakuma, Sumie Morita, Yuzo Okuyama, Kenichi Okabe
  • Patent number: 5561662
    Abstract: A switch interface unit, a monitor unit, and a control system interface unit are connected as external units to a highway to which a subscriber information processing unit is also connected so that a monitoring process, that is, a special study process, can be simplified and a cost charged for the subscriber information processing unit can be prevented from increasing greatly. Furthermore, in an accounting process, accounting parameters are accumulated in an accounting information accumulating unit for variations on compressed source addresses, not on source addresses. As a result, the accounting information accumulating unit, etc. can be realized with normal circuit elements only.
    Type: Grant
    Filed: March 17, 1994
    Date of Patent: October 1, 1996
    Assignee: Fujitus Limited
    Inventors: Satoshi Kakuma, Kazuo Hajikano, Masami Murayama, Shuji Yoshimura, Shiro Uriu, Jin Abe
  • Patent number: 5555248
    Abstract: A method and apparatus for detecting the presence or absence of errors caused along a designated section of a virtual path established within a communication network. The number of errors is detected at both the entrance and exit of a detection section. The number of errors detected at the entrance is transmitted to the exit by using a path overhead of a virtual path to be monitored, and the number of errors at the entrance is subtracted from the number of errors at the exit, thereby calculating the number of errors caused along the detection section. The path overhead containing data on the detected error count includes a parity compensation bit that is set so that the parity carried in the path overhead remains unchanged. This eliminates the need to recalculate bit interleave parity-2 for the virtual path under monitoring.
    Type: Grant
    Filed: March 16, 1994
    Date of Patent: September 10, 1996
    Assignee: Fujitu Limited
    Inventor: Eiji Sugawara
  • Patent number: 4803535
    Abstract: A dynamic random access memory having a trench capacitor includes: a semiconductor substrate; a trench formed in a semiconductor substrate; an insulating layer formed on an inner surface of the trench and having a bottom opening; a first conductive layer formed at the bottom opening position and on the insulating layer and the first conductive layer is ohmically connected to the semiconductor substrate at the bottom opening. The device includes further a dielectric layer formed on the first conductive layer; a second conductive layer formed on the dielectric layer so as to fill the trench, the first conductive layer, the dielectric layer, and the second conductive layer constituting a charge storage capacitor; and a MIS transistor formed in the semiconductor substrate, wherein the second conductive layer is ohmically connected to a source or drain region of the MIS transistor.
    Type: Grant
    Filed: March 2, 1987
    Date of Patent: February 7, 1989
    Assignee: Fujitus Limited
    Inventor: Masao Taguchi