Abstract: A protection device is enclosed. The device has a first MOSFET (Q 10), a second MOSFET (Q 11) and a third JFET (Q 12) with their conductive paths in series with the JFET (Q 12) being located between the MOSFETS (Q 10, Q 11). The source of the first MOSFET (Q 10) is connected to the gate of the second MOSFET (Q 11) and the source of the second MOSFET (Q 11) is connected to the gate of the first MOSFET (Q 10). The MOSFETS (Q 10, Q 11) and JFET (Q 12) together form a variable resistance circuit block connectable between an input and an output The gate of the JFET (Q 12) being coupled to the input and the output by respective current sources.