Patents Assigned to G-Plus, Inc.
  • Patent number: 7012472
    Abstract: A system or method for controlling a voltage controlled oscillator (VCO) or LO buffer includes an amplitude detector for detecting an amplitude value at a node corresponding to the at least one output line. A comparator compares the detected amplitude value with a predetermined amplitude value, and outputs a first digital value when the detected amplitude value is greater than the predetermined amplitude value, and a second digital value when the detected amplitude value is less than the predetermined amplitude value. An accumulator accumulates outputs of the comparator so as to provide an accumulated digital amplitude value. A digital-to-analog converter converts the accumulated digital amplitude value to an accumulated analog amplitude value. The analog accumulated amplitude value is provided as an updated bias control signal to the bias transistor of the VCO or LO buffer.
    Type: Grant
    Filed: July 9, 2004
    Date of Patent: March 14, 2006
    Assignee: G-Plus, Inc.
    Inventors: Zhiwei Xu, Yi-Cheng Wu, Mau-Chung Frank Chang
  • Patent number: 6847808
    Abstract: A CMOS implemented passive mixer circuit for improving linearity performance in wireless communication systems is described, including dual pairs of NMOS FETs and dual pairs of PMOS FETs. Each NMOS FET is connected in parallel with a corresponding PMOS FET. A local oscillator signal is provided to the gate of one FET while a 180-degree phase shifted local oscillator signal is provided to the gate of its complementary FET. Because the complementary FETs are driven by local oscillator signals that are 180 degrees out of phase, the NMOS FET is turned on for at least a portion of the positive cycle of the local oscillator signal and the PMOS FET is turned on for at least a portion of the negative cycle of the 180-degree phase shifted local oscillator signal. Distortion in the mixed output signal is thereby reduced.
    Type: Grant
    Filed: February 28, 2002
    Date of Patent: January 25, 2005
    Assignee: G-Plus, Inc.
    Inventor: Sining Zhou
  • Patent number: 6608361
    Abstract: An active inductor circuit includes a primary and a secondary coil and a drive circuit monolithically integrated on a common substrate to provide high-Q inductors. Each inductor circuit comprises a primary coil which carries a first current that varies with an RF input signal, and a secondary coil which carries a second current that varies with the RF input; an on-chip current source provides the second current. The inductor circuit is arranged such that there is a fixed phase difference of approximately 90° between the first and second currents, and such that the magnetic field induced by the second current compensates for energy that would otherwise be dissipated by the primary coil. When the second current is properly selected, the inductor circuit's input impedance is made purely imaginary, such that the circuit emulates an ideal inductor at a particular frequency.
    Type: Grant
    Filed: October 30, 2001
    Date of Patent: August 19, 2003
    Assignee: G-Plus, Inc.
    Inventors: Mau-Chung F. Chang, Yi-Cheng Wu