Patents Assigned to GARUDA TECHNOLOGY CO., LTD.
  • Patent number: 12191056
    Abstract: A buried thermistor includes a lower substrate, an upper substrate, and a number of thermistor stacks. Each thermistor stack includes two resistor subjects. Each resistor subject includes a base layer, a medium layer, a metal layer, a resistor layer, a nanometal layer, and a conductive layer. Applicable material of the resistor layer becomes more diverse by disposing the number of thermistor stacks, and the buried thermistor shows variable thermal sensitivity.
    Type: Grant
    Filed: June 28, 2022
    Date of Patent: January 7, 2025
    Assignees: HONGQISHENG PRECISION ELECTRONICS (QINHUANGDAO) CO., LTD., AVARY HOLDING (SHENZHEN) CO., LTD., GARUDA TECHNOLOGY CO., LTD.
    Inventors: Jian Wang, Jun Dai, Xiao-Juan Zhang
  • Patent number: 12153252
    Abstract: A method for manufacturing a photoelectric composite circuit board, includes providing a copper-clad carrier and an intermediate circuit, the copper-clad carrier includes a substrate layer and a bottom copper layer, a first groove is defined on the intermediate circuit. Forming an optical fiber in the first groove. Forming a first accommodating groove and a second accommodating groove at each end the optical fiber. Accommodating a first coupling element in the first accommodating groove. Removing the substrate layer. Removing the bottom copper layer corresponding to the optical fiber, the intermediate circuit on one side of the optical fiber and the bottom copper layer forming a first circuit substrate, the intermediate circuit on another side of the optical fiber and the bottom copper layer forming a second circuit substrate. Electrically connecting a chip to the first circuit substrate, and electrically connecting an electronic component to the second circuit substrate.
    Type: Grant
    Filed: July 31, 2023
    Date of Patent: November 26, 2024
    Assignees: Avary Holding (Shenzhen) Co., Limited., QING DING PRECISION ELECTRONICS (HUAIAN) CO., LTD, GARUDA TECHNOLOGY CO., LTD.
    Inventor: Wei-Liang Wu
  • Patent number: 12120812
    Abstract: A circuit board includes a dielectric substrate, a signal line and a pair of ground wires. The dielectric substrate includes a base and an elevated platform protruding from an upper surface of the base. The signal line is conformally disposed on the dielectric substrate and includes a first segment disposed on an upper surface of the elevated platform, a second segment extending on the upper surface of the base, and a third segment disposed on a sidewall of the elevated platform and connecting the first segment and the second segment. The pair of ground wires are disposed on the dielectric substrate and are spaced apart from the signal line. A projection of the second segment of the signal line on the upper surface of the base partly overlaps projections of the pair of ground wires on the upper surface of the base.
    Type: Grant
    Filed: December 29, 2021
    Date of Patent: October 15, 2024
    Assignees: HongQiSheng Precision Electronics (QinHuangdao) Co., Ltd, Avary Holding (Shenzhen) Co., Ltd., Garuda Technology Co., Ltd.
    Inventors: Hao-Yi Wei, Childe Zhu, Yan-Lu Li
  • Patent number: 12108533
    Abstract: A method for manufacturing a circuit board includes disposing an electronic component in a recess formed in a first circuit substrate, and bonding a second circuit substrate to the first circuit substrate to form a third circuit substrate with the electronic component embedded. The method includes forming an opening in the third circuit substrate to expose the electronic component and an inner surface of the third circuit substrate. The method includes disposing an insulation case in the opening. The insulation case has a first segment directly contacting the electronic component, a second segment facing the inner surface, an inner wall between the first and second segments, a first chamber surrounded by the first segment and the inner wall, and a second chamber surrounded by the second segment and the inner wall. The method includes adding a heat-exchanging fluid into the first chamber.
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: October 1, 2024
    Assignees: AVARY HOLDING (SHENZHEN) CO., LTD., QINGDING PRECISION ELECTRONICS (HUAI'AN) CO., LTD., GARUDA TECHNOLOGY CO., LTD.
    Inventors: Zhi Guo, Chen Xiong, Po-Yuan Chen
  • Patent number: 12101871
    Abstract: A circuit board utilizing thermocouples for improved heat dissipation performance from circuit boards includes a heat dissipation module which itself includes a first circuit substrate, a thermocouple, and a second circuit substrate. The first circuit substrate includes a first wiring layer comprising first and second wiring portions. The thermocouple includes a P-type and an N-type semiconductor. The second circuit substrate includes a second wiring layer with a third wiring portion. Conductive members electrically connect the P-type semiconductor with the first wiring portion, connect the P-type semiconductor with the third wiring portion, connect the N-type semiconductor with the second wiring portion, and connect the N-type semiconductor with the third wiring portion, to transfer away heat generated by working elements mounted on the board.
    Type: Grant
    Filed: June 20, 2022
    Date of Patent: September 24, 2024
    Assignees: Avary Holding (Shenzhen) Co., Limited., QING DING PRECISION ELECTRONICS (HUAIAN) CO., LTD, GARUDA TECHNOLOGY CO., LTD.
    Inventors: Huan-Yu He, Mei-Hua Huang, Biao Li, Jin-Cheng Wu
  • Patent number: 12082352
    Abstract: A flexible circuit board includes two first wiring boards, a first adhesive, and a first conductive structure. Each of the two first wiring boards includes a first bent portion, and two first bent portions of the two wiring boards is connected to each other. The first adhesive layer is sandwiched between the two first bent portions. The first conductive structure penetrates the two first bent portions and the first adhesive layer and electrically connects the two first bent portions.
    Type: Grant
    Filed: July 21, 2022
    Date of Patent: September 3, 2024
    Assignees: Avary Holding (Shenzhen) Co., Limited., QING DING PRECISION ELECTRONICS (HUAIAN) CO., LTD, GARUDA TECHNOLOGY CO., LTD.
    Inventors: Yao-Cai Li, Biao Li, Hao-Wen Zhong
  • Patent number: 12028967
    Abstract: A wiring substrate includes a first insulating layer with a first opening, a second insulating layer with a second opening, a high-frequency wiring layer, a first wiring layer, a second wiring layer, and a plurality of conductive pillars. The high-frequency wiring layer including a high-frequency trace is sandwiched between the first insulating layer and the second insulating layer. The first opening and the second opening expose two sides of the high-frequency trace respectively. The high-frequency trace has a smooth surface which is not covered by the first insulating layer and the second insulating layer and has the roughness ranging between 0.1 and 2 ?m. The first insulating layer and the second insulating layer are all located between the first wiring layer and the second wiring layer. The conductive pillars are disposed in the second insulating layer and connected to the high-frequency trace.
    Type: Grant
    Filed: March 30, 2023
    Date of Patent: July 2, 2024
    Assignees: Avary Holding(Shenzhen)Co., Ltd., HongQiSheng Precision Electronics(QinHuangdao)Co., Ltd., Garuda Technology Co., Ltd.
    Inventors: Mao-Feng Hsu, Zhi-Hong Yang
  • Publication number: 20240147629
    Abstract: A method of manufacturing a circuit board assembly, including: providing a circuit substrate, the circuit substrate having a base layer, a wiring layer formed on the base layer, and a conductive casing formed on the wiring layer, the conductive casing defining a cavity for exposing the wiring layer; mounting an electronic component in the cavity, the electronic component electrically connected to the exposed wiring layer; filling a heat conductive medium in the cavity, the electronic component immersed in the heat conductive medium; forming a conductive cover on the conductive casing, the conductive cover enclosing the conductive casing.
    Type: Application
    Filed: October 31, 2023
    Publication date: May 2, 2024
    Applicants: HongQiSheng Precision Electronics (QinHuangDao) Co.,Ltd., Avary Holding (Shenzhen) Co., Limited., GARUDA TECHNOLOGY CO., LTD.
    Inventors: CHANG-HE ZHU, YANG LI, JIAN WANG, LI-KUN LIU, YAN-LU LI
  • Patent number: 11968788
    Abstract: A method for manufacturing a fixing belt for a wearable device, includes providing a flexible circuit board including a first area, a second area, and a pad in the first area; disposing an insulating layer on the flexible circuit board, the insulating layer being disposed in the second area; forming an electric conductive portion in the insulating layer; disposing a first protective layer and a second protective layer on opposite surfaces of the flexible circuit board, the electric conductive portion being between the flexible circuit board and the first protective layer; mounting an electronic component on the pad. A portion of the fixing belt containing the second area is a plug-in area, and the plug-in area is configured to be engaged with a device body of the wearable device, the electric conductive portion is disposed in the plug-in area.
    Type: Grant
    Filed: May 28, 2021
    Date of Patent: April 23, 2024
    Assignees: Avary Holding (Shenzhen) Co., Limited., QING DING PRECISION ELECTRONICS (HUAIAN) CO., LTD, GARUDA TECHNOLOGY CO., LTD.
    Inventors: Yong-Quan Yang, Han-Pei Huang
  • Patent number: 11825595
    Abstract: The disclosure provides a circuit board assembly, which includes a core layer, an electronic component, a first shielding ring wall, a second shielding ring wall, a first circuit layer, a second circuit layer, a first insulating layer and a plurality of shielding columns. The core layer has an accommodating space, in which the accommodating space has an inner sidewall. The electronic component is disposed in the accommodating space. The first shielding ring wall is disposed in the accommodating space and covers the inner sidewall, in which the first shielding ring wall surrounds the electronic component and is not in contact with the electronic component. The second shielding ring wall is disposed in the core layer and surrounds the first shielding ring wall. The core layer is disposed between the first circuit layer and the second circuit layer. The shielding columns are disposed in the first insulating layer.
    Type: Grant
    Filed: December 30, 2021
    Date of Patent: November 21, 2023
    Assignees: HONGQISHENG PRECISION ELECTRONICS (QINHUANGDAO) CO., LTD., GARUDA TECHNOLOGY CO., LTD.
    Inventors: Mao-Feng Hsu, Zhi-Hong Yang
  • Patent number: 11792914
    Abstract: The disclosure provides a circuit board assembly, which includes a core layer, an electronic component, a first shielding ring wall, a second shielding ring wall, a first circuit layer, a second circuit layer, a first insulating layer and first shielding columns. The core layer includes an accommodating space, and the accommodating space has an inner side wall. The first shielding ring wall is disposed in the accommodating space and covers the inner side wall, in which the first shielding ring wall surrounds the electronic component. The second shielding ring wall is disposed in the core layer and surrounds the first shielding ring wall. The core layer is disposed between the first circuit layer and the second circuit layer. The second circuit layer is disposed between the first insulating layer and the core layer. The first shielding columns are disposed in the first insulating layer.
    Type: Grant
    Filed: December 29, 2021
    Date of Patent: October 17, 2023
    Assignees: AVARY HOLDING (SHENZHEN) CO., LTD., HONGQISHENG PRECISION ELECTRONICS (QINHUANGDAO) CO., LTD., GARUDA TECHNOLOGY CO., LTD.
    Inventors: Zhi-Hong Yang, Mao-Feng Hsu
  • Patent number: 11754781
    Abstract: A circuit board utilizing the better and faster performance of optical signals includes interconnected first, second, and third areas. The first area includes a first circuit substrate, and a first coupling element and a chip connected thereon. The second area includes an optical fiber within an insulating layer. The third area includes a second circuit substrate, and a second coupling element and an electronic element connected thereon. The first coupling element and the second coupling element are optically aligned with the optical fiber for signal reception and transmission. A method for manufacturing such composite circuit board is also disclosed.
    Type: Grant
    Filed: May 26, 2021
    Date of Patent: September 12, 2023
    Assignees: Avary Holding (Shenzhen) Co., Limited., QING DING PRECISION ELECTRONICS (HUAIAN) CO..LTD, GARUDA TECHNOLOGY CO., LTD.
    Inventor: Wei-Liang Wu
  • Patent number: 11744004
    Abstract: A circuit board includes a first outer wiring layer, a circuit substrate, and a second outer wiring layer stacked. The circuit substrate includes a first inner wiring layer, an insulating layer, and a second inner wiring layer stacked. A plurality of thermally conductive pillars is arranged at intervals on the first inner wiring layer, a liquid storage space is formed between every two adjacent thermally conductive pillars, and a thermally conductive agent is received in the liquid storage space. The first outer wiring layer is formed on the plurality of thermally conductive pillars. The second outer wiring layer is formed the second inner wiring layer. A first groove penetrates the second outer wiring layer, the second inner wiring layer and the insulating layer, exposes a portion of the first inner wiring layer, and corresponds to the thermally conductive pillars. At least one heating element is installed in the first groove.
    Type: Grant
    Filed: September 2, 2021
    Date of Patent: August 29, 2023
    Assignees: QING DING PRECISION ELECTRONICS (HUAIAN) CO., LTD, Avary Holding (Shenzhen) Co., Limited., GARUDA TECHNOLOGY CO., LTD.
    Inventor: Wei-Xiang Li
  • Patent number: 11696391
    Abstract: A wiring substrate includes a first insulating layer with a first opening, a second insulating layer with a second opening, a high-frequency wiring layer, a first wiring layer, a second wiring layer, and a plurality of conductive pillars. The high-frequency wiring layer including a high-frequency trace is sandwiched between the first insulating layer and the second insulating layer. The first opening and the second opening expose two sides of the high-frequency trace respectively. The high-frequency trace has a smooth surface which is not covered by the first insulating layer and the second insulating layer and has the roughness ranging between 0.1 and 2 ?m. The first insulating layer and the second insulating layer are all located between the first wiring layer and the second wiring layer. The conductive pillars are disposed in the second insulating layer and connected to the high-frequency trace.
    Type: Grant
    Filed: November 30, 2021
    Date of Patent: July 4, 2023
    Assignees: AVARY HOLDING (SHENZHEN) CO., LTD., HONGQISHENG PRECISION ELECTRONICS (QINHUANGDAO) CO., LTD., GARUDA TECHNOLOGY CO., LTD
    Inventors: Mao-Feng Hsu, Zhi-Hong Yang
  • Patent number: 11627668
    Abstract: A circuit board includes a circuit substrate, a solder, and a surrounding portion. The circuit substrate includes a connecting pad. The solder is formed on a surface of the connecting pad. The surrounding portion is formed on the surface of the connecting pad and cooperates with the connecting pad to form a groove receiving the solder. The surrounding portion surrounds the solder and is spaced from the solder. A method for manufacturing a circuit board is also provided.
    Type: Grant
    Filed: May 26, 2021
    Date of Patent: April 11, 2023
    Assignees: Avary Holding (Shenzhen) Co., Limited., HongQiSheng Precision Electronics (QinHuangDao) Co., Ltd., GARUDA TECHNOLOGY CO., LTD.
    Inventors: Yong-Chao Wei, Po-Yuan Chen
  • Patent number: 11617263
    Abstract: A method for manufacturing a circuit board embeds a portion of an outer circuit layer in an outer dielectric layer which increases contact area between the outer circuit layer and the outer dielectric layer, improving adhesion between the outer circuit layer and the outer dielectric layer, and reducing a thickness of the outer circuit substrate, thereby reducing the overall thickness of the finished circuit board.
    Type: Grant
    Filed: May 31, 2021
    Date of Patent: March 28, 2023
    Assignees: Avary Holding (Shenzhen) Co., Limited., HongQiSheng Precision Electronics (QinHuangDao) Co., Ltd., GARUDA TECHNOLOGY CO., LTD.
    Inventors: Lin-Jie Gao, Yong-Chao Wei
  • Patent number: 11606862
    Abstract: A circuit board includes a circuit substrate, at least one metal pad, and a tin bar corresponding to each of the at least one metal pad. Each of the at least one metal pad is formed on a side of the circuit substrate and is electrically connected to the circuit substrate. A surface of the metal pad facing away from the circuit substrate is recessed toward the circuit substrate to from a recess. The tin bar is received in the recess. A method for manufacturing a circuit board is also provided.
    Type: Grant
    Filed: May 26, 2021
    Date of Patent: March 14, 2023
    Assignees: Avary Holding (Shenzhen) Co., Limited., HongQiSheng Precision Electronics (QinHuangDao) Co., Ltd., GARUDA TECHNOLOGY CO., LTD.
    Inventors: Po-Yuan Chen, Yong-Chao Wei
  • Patent number: 11589463
    Abstract: A method for manufacturing a circuit board including the following steps: providing a flexible double-sided metal-clad laminate including a first metal foil, a flexible dielectric layer, and a second metal foil. A carrier is attached to the second metal foil. A first wiring layer including a first wiring region and a second wiring region is formed by the first metal foil. The first wiring region includes a first connecting pad, and the second wiring region includes a connecting pad. A plurality of rigid dielectric blocks surrounded to form an interval and a first groove exposing the first connecting pad is pressed on the flexible dielectric layer to form a rigid dielectric layer. An electronic component is fixed the first groove. The carrier is removed. The intermediate structure is bent along the interval and pressed. A second wiring layer is formed by the second metal foil.
    Type: Grant
    Filed: May 26, 2021
    Date of Patent: February 21, 2023
    Assignees: Avary Holding (Shenzhen) Co., Limited., QING DING PRECISION ELECTRONICS (HUAIAN) CO., LTD, GARUDA TECHNOLOGY CO., LTD.
    Inventors: Jia-He Li, Yong-Chao Wei
  • Patent number: 11576257
    Abstract: A circuit board includes a substrate, a first inner circuit layer, a second inner circuit layer, a first insulating layer, a first optical fiber extending along a first direction, an optical component, an electrical component, a transparent insulating layer, a first inclined surface, a first reflective layer, a second inclined surface, a second reflective layer, and a second optical fiber extending along a second direction.
    Type: Grant
    Filed: May 19, 2022
    Date of Patent: February 7, 2023
    Assignees: Avary Holding (Shenzhen) Co., Limited., QING DING PRECISION ELECTRONICS (HUAIAN) CO., LTD, GARUDA TECHNOLOGY CO., LTD.
    Inventors: Wei-Liang Wu, Jia-He Li
  • Patent number: 11570883
    Abstract: A circuit board with improved heat dissipation function and a method for manufacturing the circuit board are provided. The circuit board includes a heat dissipation substrate, an insulating layer on the heat dissipation substrate, an electronic component, a base layer on the insulating layer, and a circuit layer on the base layer. The heat dissipation substrate includes a phase change structure and a heat conductive layer wrapping the phase change structure. The heat dissipation substrate defines a first through hole. The insulating layer defines a groove for receiving the electronic component. A second through hole is defined in the circuit layer, the base layer, and the insulating layer. A bottom of the second through hole corresponds to the heat conductive layer. A heat conductive portion is disposed in the second through hole.
    Type: Grant
    Filed: June 22, 2021
    Date of Patent: January 31, 2023
    Assignees: Avary Holding (Shenzhen) Co., Limited., HongQiSheng Precision Electronics (QinHuangDao) Co., Ltd., GARUDA TECHNOLOGY CO., LTD.
    Inventors: Ying Wang, Yong-Chao Wei