Abstract: A chip capacitor is conductively coupled to spaced-apart (i.e., non-conductively coupled) circuit traces of an integrated circuit to provide a four terminal network. The chip capacitor includes a casing of dielectric material having first and second sets of electrode plates disposed therein, a first conductive lead frame which is conductively coupled to the first set of electrode plates, and a second conductive lead frame which is conductively coupled to the second set of electrode plates. The first and second lead frames are, in turn, conductively coupled to the circuit traces so as to route the output (or input) current of an electronic device through the capacitor.