Abstract: Multi-dimensional photonic integrated circuits are provided, including a substrate having a first side and a second side, a multi-dimensional package having multi-dimensional planes, and one or more optical components connected to the first side and the second side of the substrate and on the multi-dimensional planes of the multi-dimensional package. The multi-dimensional planes include one or more horizontal sides and one or more vertical sides. One or more of the optical components are mounted on at least one of the horizontal sides of the multi-dimensional package and one or more of the optical components are mounted on at least one of the vertical sides of the multi-dimensional package. Hybrid systems of conventional multi-dimensional integrated circuits and multi-dimensional photonic integrated circuits also are provided.

Abstract: Computer-implemented systems and methods for eliminating geometrical design rule violations, maintaining mask layout electrical connectivity, reliability verification, and design for manufacturing structural correctness of a mask layout block are provided. Exemplary systems and methods include comparing a feature dimension in a mask layout data file with a design rule in a reference rule file and identifying a design rule violation of a mask layout block if the feature dimension does not match the design rule. Methods may further include automatically correcting the design rule violation by modifying the feature dimension so the feature dimension matches the design rule. A design rule auto-correction tool may be provided and be configured to compare a feature dimension in a mask layout data file with a design rule in a reference rule file and correct the design rule violation. Disclosed embodiments advantageously correct all design rules including dependency rules.

Abstract: Computer-implemented systems and methods for improving construction of a mask layout block, for eliminating electromigration and self-heat violations during construction of a mask layout block, and for maintaining process design rules and layout connectivity during construction of a mask layout block are provided. At least one selected polygon is analyzed and a selected position of the selected polygon determined. The systems and methods obtain one or more electromigration rules or self-heat rules associated with the selected polygon. An information window with the one or more electromigration or self-heat rules and a violation marker associated with the selected position of the selected polygon are provided. The system determines if the selected position of the selected polygon or a length or width of the selected polygon violates an electromigration rule or self-heat rule.