Abstract: A method of controlling an automatic gain in a receiver includes receiving an input signal through an antenna of the receiver, by an automatic gain control unit of the receiver, setting a final RF gain, and by the automatic gain control unit, setting an IF gain in a state that the final RF gain is set.

Abstract: An interference canceller (500) includes an interference cancellation coefficient calculator (510) configured to calculate an interference cancellation coefficient using a received value located in a location of a reference signal (RS) from a channel estimate H calculated by a channel estimator and a received signal r delivered from an FFT, an interference cancellation filter (520) configured to cancel interference in the received signal and the channel estimate using the calculated interference cancellation coefficient, an increment or decrement operator (530) configured to increase or decrease the received signal and the channel estimate by ? times; an interference cancellation output controller (540) configured to receive a channel estimate before interference cancellation and a channel estimate after interference cancellation to compare a signal before the interference cancellation with a signal after the interference cancellation and then determine whether to deliver the signal before applying the interf

Abstract: A receiver includes a mixer configured to convert a radio frequency (RF) signal into a baseband, an impedance shaping unit configured to shape a magnitude of load impedance seen in an output terminal of the mixer in a frequency band of an interference signal converted into the baseband so as to reduce the magnitude of the load impedance, and a trans-impedance amplifier configured to amplify the signal converted into the baseband.

Abstract: Disclosed is a method of transmitting dual digital signals through a single antenna. The method includes receiving, by a transmitter, a first data stream and a second data stream which use the same carrier frequency, modulating, by the transmitter, each of the first data stream and the second data stream, lowering, by the transmitter, a power level of the modulated second data stream, combining, by the transmitter, the modulated first data stream and the second data stream with the lowered power level, and transmitting, by the transmitter, the added first data stream and second data stream to a single antenna in the same channel.

Abstract: An interference canceller (500) includes an interference cancellation coefficient calculator (510) configured to calculate an interference cancellation coefficient using a received value located in a location of a reference signal (RS) from a channel estimate H calculated by a channel estimator and a received signal r delivered from an FFT, an interference cancellation filter (520) configured to cancel interference in the received signal and the channel estimate using the calculated interference cancellation coefficient, an increment or decrement operator (530) configured to increase or decrease the received signal and the channel estimate by ? times; an interference cancellation output controller (540) configured to receive a channel estimate before interference cancellation and a channel estimate after interference cancellation to compare a signal before the interference cancellation with a signal after the interference cancellation and then determine whether to deliver the signal before applying the interf

Abstract: Disclosed is a method of transmitting dual digital signals through a single antenna. The method includes receiving, by a transmitter, a first data stream and a second data stream which use the same carrier frequency, modulating, by the transmitter, each of the first data stream and the second data stream, lowering, by the transmitter, a power level of the modulated second data stream, combining, by the transmitter, the modulated first data stream and the second data stream with the lowered power level, and transmitting, by the transmitter, the added first data stream and second data stream to a single antenna in the same channel.

Abstract: A receiver includes a mixer configured to convert a radio frequency (RF) signal into a baseband, an impedance shaping unit configured to shape a magnitude of load impedance seen in an output terminal of the mixer in a frequency band of an interference signal converted into the baseband so as to reduce the magnitude of the load impedance, and a trans-impedance amplifier configured to amplify the signal converted into the baseband.

Abstract: A receiver includes a first mixer configured to provide an in-phase (I) component of a radio frequency (RF) signal to an I channel by down-converting the RF signal, a second mixer configured to provide a quadrature (Q) component of the RF signal to a Q channel by down-converting the RF signal, amplification means, arranged on the I and Q channels, configured to amplify the I and Q components, a mismatch estimator configured to convert the amplified I and Q components into a frequency domain, and estimate a gain mismatch value and a phase mismatch value on the basis of the converted components, and a mismatch compensator configured to compensate for mismatch of the received signal on the basis of the estimated gain and phase mismatch values.

Abstract: Embodiments according to the application relates to an OFDM (orthogonal frequency division multiplexing) receiving circuit and methods thereof configured to have a plurality of demodulation paths for an oversampling ADC, which can increase or improve an overall performance of the circuit.

Abstract: The present invention relates to an apparatus and a method for measuring an in phase and quadrature (IQ) imbalance. One embodiment according to the present general inventive concept can provide a method for measuring a Tx IQ imbalance generated in an IQ up-conversion mixer and an Rx IQ imbalance generated in an IQ down-conversion mixer, that includes measuring a first IQ imbalance corresponding to a first combination of the Rx IQ imbalance with the Tx IQ imbalance, measuring a second IQ imbalance corresponding to a second combination of the Rx IQ imbalance with the Tx IQ imbalance and obtaining the Tx IQ imbalance and the Rx IQ imbalance from the first IQ imbalance and the second IQ imbalance.

Abstract: The present general inventive concept relates to apparatuses and/or methods for measuring an in-phase and quadrature (IQ) imbalance. In one embodiment, a detector can measure an error caused by an IQ imbalance using a first IQ signal including a desired signal and a corresponding image signal by the IQ imbalance. The detector can include a derotator to derotate the first IQ signal by a first angular frequency to obtain a second IQ signal and derotate the first IQ signal by a second angular frequency to obtain a third IQ signal, a DC estimator to obtain a fourth IQ signal corresponding to a DC component of the second IQ signal and a fifth IQ signal corresponding to a DC component of the third IQ signal and a controller can determine a gain error or a phase error from the fourth IQ signal and the fifth IQ signal.

Abstract: The present general inventive concept relates to apparatuses and/or methods for measuring an in-phase and quadrature (IQ) imbalance. In one embodiment, a signal generator can provide a first IQ signal of a DC component during a first period and the first IQ signal of a first angular frequency during a second period, an IQ up-conversion mixer can up-convert the first IQ signal by a second angular frequency during the first period and up-convert the first IQ signal by a third angular frequency during the second period to output a second IQ signal, an IQ down-conversion mixer can down-convert the second IQ signal by the third angular frequency to output a third IQ signal and an IQ imbalance detector can obtain a first IQ imbalance (e.g., Rx IQ imbalance) from the third IQ signal during the first period and a second IQ imbalance (e.g., Tx/Rx IQ imbalance) during the second period.

Abstract: Embodiments of a phase lock loop and a method for compensating a temperature thereof can output an initial tuning digital value for a voltage controlled oscillator configured to output a desired phase lock loop frequency compensated according to a temperature change. Embodiments of a phase lock loop and a method for compensating a temperature thereof can simultaneously perform a digital coarse tuning and an analog fine tuning to compensate for a temperature in a limited time.

Abstract: An integrated circuit package includes an inductance loop formed from a connection of bonding wires and one or more input/output (I/O) package pins. In one embodiment, the inductance loop is formed from a first wire which connects a bonding pad on the integrated circuit chip to an I/O pin of the package and a second wire which connects the same bonding pad to the same pin. By forming the inductor loop within the limits of the integrated circuit package, a substantial reduction in space requirements is realized, which, in turn, promotes miniaturization.

Abstract: Embodiments of the present general inventive concept relate to a transient signal compensator for apparatuses such as a transceiver or receiver used in a wire/wireless communication and/or a digital signal processor that may be used in the receiver and methods thereof. In one embodiment, a receiver can include an amplifier to amplify a received signal, a digital filter to filter a digital signal corresponding to an output signal of the amplifier, where the digital filter is configured to replace a corresponding value (e.g., stored in a memory) for the digital filter with a gain compensated value during a predetermined delay time after a gain of the amplifier is changed (e.g., from a first gain g1 to a different second gain g2). The gain compensated value to compensate for a transient signal (e.g., related to the change from the first gain g1 to the second gain g2).

Abstract: The application discloses embodiments of methods and/or systems for compensating a transmission carrier leakage of an up-conversion mixer, a tranceiving circuit or apparatus embodying the same. One embodiment of a method can include detecting an I channel DC offset DCI0 and a Q channel DC offset DCQ0 generated by a reception carrier leakage from an output of a down-conversion mixer, detecting an I channel DC offset DCI and a Q channel DC offset DCQ from the output of the down-conversion mixer while varying a compensation parameter being inputted to an up-conversion mixer that has its output coupled to an input of the down-conversion mixer to determine the compensation parameter that can reduce or minimize a transmission carrier leakage. A combination of a transmission baseband signal and the determined compensation parameter can be transmitted using the up-conversion mixer and an antenna to compensate for the transmission carrier leakage.

Abstract: Embodiments of an RFIC and methods for same and mobile terminals can internally reduce an input voltage to provide a prescribed voltage to a radio frequency transceiver. Embodiments of an RFIC can have a high efficiency and/or a low noise. In one embodiment, a device can include a PMIC and an RFIC. The RFIC can include an RF transceiver to carry out an RF transmission and an RF reception, a DC-DC converter to lower a voltage provided by the PMIC, and an LDO regulator to regulate the lowered voltage to a fixed voltage used by the RF transceiver.

Abstract: Embodiments of the present general inventive concept include a low noise amplifier and method with an improved linearity while reducing a noise disadvantage (e.g., increase). One embodiment of a low noise amplifier can include a first transistor to receive an input signal at a control terminal thereof, a second transistor having a first terminal coupled to a second terminal of the first transistor, an envelope detector to output a control signal corresponding to a characteristic of the input signal and an envelope amplifier to amplify the control signal to be applied to a control terminal of the second transistor.

Abstract: An integrated circuit package includes an inductance loop formed from a connection of lead wires and one or more input/output (I/O) package pins. In one embodiment, the inductance loop is formed from first and second wires which connect a first bonding pad on the integrated circuit chip to a first I/O pin of the package and a third and fourth wires which connect a second bonding pad on the chip to a second I/O pin of the package. To complete the inductor loop, the first and second I/O pins are connected by a third conductor between the pins. The third conductor may include one or more bonding wires and the I/O pins are preferably ones which are adjacent one another. However, the loop may be formed from non-adjacent connections of I/O pins based, for example, on loop-length requirements, space considerations, and/or other design or functional factors. In another embodiment, connection between the first and second I/O pins is established by making the I/O pins have a unitary construction.

Abstract: A bidirectional turbo ISI canceller cancels precursor-ISI as well as postcursor-ISI in a received signal without incorporating a multiplicative feedforward equalization filter. This is accomplished by taking a three-step receiver design approach. In the first step, an optimal single-symbol RAKE receiver is designed to comprise a CMF, a codeword correlator bank, and an energy bias (EB) canceller under the assumption that no ISI is generated by preceding or trailing symbols. In a second step, a DFE is included for suppressing postcursor-ISI caused by a preceding symbol. Finally, a precursor ISI canceler is used to remove the remaining ISI caused by a trailing symbol. All three components may be integrated into a BTIC-based receiver applying turbo-iteration processing.