Patents Assigned to GE Solid State Patents, Inc.
  • Orthogonal bipolar transistor
    Patent number: 4792837
    Abstract: An orthogonal bipolar transistor structure is disclosed which is particularly suitable for formation in relatively thin epitaxial layers on insulating substrates. The emitter of the transistor is disposed directly over the base region while a collector region may be arranged on one side of or surrounding the base region. Alternatively, the collector region may be a pair of regions disposed laterally on opposite sides of the base region.
    Type: Grant
    Filed: February 26, 1986
    Date of Patent: December 20, 1988
    Assignee: GE Solid State Patents, Inc.
    Inventor: Victor Zazzu
  • Integrated circuit device having slanted peripheral circuits
    Patent number: 4789889
    Abstract: The present invention sets forth an integrated circuit (IC) device wherein the IC chip includes peripheral circuits, such as input/output circuits, which are arranged non-perpendicular with respect to the rectangular shape of the active area of the IC. This structure permits positioning some of the terminal bond pads closely adjacent the corners of the chip without overlap of adjacent circuits.
    Type: Grant
    Filed: November 20, 1985
    Date of Patent: December 6, 1988
    Assignee: GE Solid State Patents, Inc.
    Inventors: Stephen W. Morris, Richard P. Lydick
  • Integrated lateral PNP transistor and current limiting resistor
    Patent number: 4785339
    Abstract: A PNP transistor and a current limiting resistor are formed in a single active region of an integrated circuit device. The resistor is arranged to limit current flow between the emitter and collector regions of the transistor upon breakdown of the PN junctions due to momentary high voltage.
    Type: Grant
    Filed: October 3, 1986
    Date of Patent: November 15, 1988
    Assignee: GE Solid State Patents, Inc.
    Inventor: Thomas R. De Shazo, Jr.