Abstract: A method for updating information elements in a memory which includes a plurality of memory locations. An initial value D0 has been written at a first location E0 of the memory, E0 being determined by an initial value of a string of indicator bits, the initial value being defined by the parity of the rank of a last bit of the string of indicator bits in a programmed state.

Abstract: The method is designed to increase the protection of a microcircuit-based memory card comprising at least one memory coupled to a data-processing element. When said data-processing element receives a command by a data signal external to the card, said method consists in making said data-processing element emit a ratification signal at an instant that is deferred, with respect to the instant at which its emission was prompted by the data signal, by a duration that is randomly variable in time. The disclosed method can be applied to microcircuit-based memory cards.

Abstract: In a memory card designed to count down a number of units by successive programming of non-volatile, electrically erasable and electrically programmable memory cells, the memory is organized into N rows of P cells, the weight of the cells of one row in the account being P times the weight of the next-ranking row. The countdown procedure is recurrent and consists in making a search, in scanning the memory according to the rising order of weights, of an erased cell, programming this cell and an erased cell and then erasing the entire row having an immediately lower rank unless the erased cell is located in the first row, and in recommencing this recurrent procedure until an erased cell is found in the first line. The auxiliary cell enables the detection of an abnormal interruption of the recurrent procedure and the restoring of the exact account of the memory which could have been distorted by this abnormal interruption.

Abstract: A method for loading and managing a plurality of applications in a memory of a chip card, the method including: recording a chart of applications in the memory of the chip card which associates a password and a memory space with a name for i) each of the plurality of applications and ii) at least one user application on that application; recording a chart of data tables in the memory of the chip card, the chart of data tables including a plurality of records, each of the plurality of records associating a name for each of the plurality of applications with a name for at least one data table of that application; recording a chart of rights in the memory of the chip card, the chart of rights associating for each of the plurality of applications, the name for the at least one data table thereof with i) the name for each of the plurality of applications, and user applications thereof, that are capable of using the at least one data table thereof and ii) a set of rights granted to the plurality of applications, an

Abstract: The method consists in pressure bonding a first strip to a second strip through a bonding press, marking each of the strips with the pattern pitches and juxtaposing the pattern pitch markings of each strip at the time of the bonding by extension of at least one strip with respect to another and by differential heating of each of the opposing strips to cause a relative shift, by expansion, of the two strips with respect to each other.

Abstract: A method of locking a smart card to block the operation of at least one protected program stored in a read-only memory or ROM of the smart card, the smart card incorporating a central processor, the ROM, an erasable programmable read-only memory or EPROM and a random access memory or RAM, the method including the steps of: entering a logic lock in the EPROM, making multiple copies of the logic lock in the EPROM, carrying out a logic OR on the logic lock in the EPROM and the multiple copies of the logic lock in the EPROM in order to block the performance of the protected program upon the detection of either (a) the logic lock in the EPROM or (b) at least one of the multiple copies of the logic lock in the EPROM, recopying the logic lock in the RAM, and performing the logic OR on the logic lock in the EPROM, the multiple copies of the logic lock in the EPROM, and the logic lock in the RAM.

Abstract: The invention relates to integrated circuits and, notably, to circuits for which it is desired to provide security against any fraudulent usage. The circuits concerned are microprocessor circuits having a program memory, a programmable non-volatile memory, at least one input/output port and an RS register memorizing the signals from sensors of abnormal conditions. This register is accessible by the microprocessor. There is provision for means to check the state of the register immediately before any operation for the writing or erasure of the programmable memory, and immediately before any transmission of data towards the exterior of the input/output port, and means to interrupt the working of the microprocessor if the check reveals abnormal conditions.

Abstract: An integrated circuit, supplied with a supply voltage Vcc, the intergrated circuit including: an antifuse including terminals; and a programming circuit for programming the antifuse, the programming circuit using a programming voltage Vpp that is substantially higher than the supply voltage Vcc, wherein the programming circuit including structure to apply the supply voltage Vcc to the terminals of the antifuse immediately after an application of the programming voltage Vpp to the terminals of the antifuse so that programming of the antifuse is not interrupted.

Abstract: A circuit to produce a voltage Vpp from a lower voltage supply Vcc is useful, for example, to produce the voltage for programming the cells of an electrically programmable memory. The circuit has a load pump (PMP), a regulator (REG) to interrupt the working of the load pump when the voltage Vpp exceeds a predetermined voltage (Vpp0), a transistor (T1) to interrupt the current consumption of the regulator when the load pump is interrupted, and a control circuit (CTRL) to then monitor the voltage Vpp and ascertain that it does not drop by more than a small value dV below Vpp0 and to restart both the load pump and the current supply of the regulator if the voltage drops more than dV.

Abstract: A fuse circuit including: a physical fuse; a detection circuit for the detection of the state of the physical fuse; and an electrically programmable non-volatile memory cell associated with the physical fuse, programmed when the physical fuse is blown and connected to the detection circuit so that, when the electrically programmable non-volatile memory cell is programmed, the electrically programmable non-volatile memory cell confirms the blown state of the physical fuse even if the characteristics of the blown state of the physical fuse change with time.

Abstract: The invention relates to a method for welding thermoweldable sheets of which at least one is made of polycarbonate. The method is characterized in that the sheets to be welded are separated from the metal electrodes (4,5) of the high frequency press by means of a glass plate (2,3). Application to the fabrication of high density magnetic cards.

Abstract: A method that enables the certification, at reception as well as at transmission, of messages sent by facsimile includes writing characteristic elements of a message in a rectangular box at the head of this message. A certifier device is used to decode alphanumerical characters of this box, encrypt them, and fashion an alphanumerical seal which is transmitted on the line of the facsimile machine with the standard code of facsimile transmission signals. At reception, the seal appears at the bottom of the message while the box appears always at the top of the message. To authenticate this seal, the receiver may approach an information retrieval center which will carry out the encoding operation on the contents of the box and compare the result with the seal to authenticate the message.

Abstract: The invention relates to a machine for the electrical and graphic customization of chip cards. Instead of a standard thermal print head which is applied flat against the card to be printed on and then requires the bending of the chip card during the printing, a vertical print head (120) is used, the heating elements of this vertical print head being arranged on the edge of a thin vertical support. The card (116) can be shifted in a flat position and in an unbent state beneath this head during the graphical printing. It is then delivered, while still in a flat position, to a standard chip card reader (150) in which the electrical customization is done. The cards are not damaged, the mechanical features are greatly simplified and there is no risk of mixing up the graphic and electrical data corresponding to several different cards.

Abstract: The invention relates to PC-cards.In order to permit communications between readers operating according to several different communication protocols, according to the invention said card comprises:several conversion circuits (CNV1, CNV2, CNV3), each of which is able to convert into instructions performable by the card the electrical signals received from the reader according to a given protocol, each of the different conversion circuits corresponding to a different communication protocol,and a protocol selection circuit (CNVA, L0, L1, L2, L3, G1 to G6), incorporating an auxiliary conversion circuit (CNVA), the latter being able to produce specific instructions performable by the card, said specific instructions being used for the selection of one of the conversion circuits and being produced from electrical signals which can be produced in all the protocols.

Abstract: A system comprises at least, two parts, connected to each other by the means of a common communication interface wherein a first communicating apparatus A, having data processing means, communication means, memory means and random or pseudo-random generation means relies of the computational power of a second communicating apparatus B having data processing means, communication means and memory means in order to compute the inverse of a first number x modulo a second number n and use the resulting modular inverse in an encryption, decryption, key exchange, identification or digital signature cryptographic protocol.

Abstract: The invention proposes a portable case for an electronic smart card (C), comprising, on one of its main faces, electrical contact bands connected to an integrated circuit containing the card memory, of the type in which provision is made for a compartment which receives the card (C) and connection means (72) for connecting the contact bands to an exploitation electronic circuit providing at least a function of reading the data contained in the card, characterized in that it comprises a casing (10, 12, 14) equipped with a window (22) permitting the insertion of the card (C), an electrical connector (72) whose electrical contact elements (73) interact with the said contact bands when the card is in the position of exploitation of the data, a device for emitting and receiving (112, 114) data towards and from an information-processing station, and a switch (120) for detecting the placing of the card (C) in an exploitation position in the casing (10).

Abstract: The MOS cell with adjustable threshold voltage is a cell of the type with a memory that is electrically-erasable and programmable by storage of charges by tunnel effect in a floating gate. To obtain a circuit with adjustable threshold voltage, the cell is first of all "programmed" at zero so that all the charges that may be stored are removed and then it is "erased", with its source grounded, its drain taken to the high potential and its control gate taken to the potential desired for the threshold voltage V.sub.T of the circuit. At the end of this phase, the threshold voltage is adjusted. This device can be applied notably to circuits requiring precise voltage references in MOS technology, namely circuits of the detector or analog-digital converter type.