Abstract: The present invention provides a clip device capable of reducing process steps for the work of connecting a base member, an opening/closing member and a double torsion spring to one another. This clip device is configured in such a manner that the base member and the opening/closing member are connected via both shaft bearings and a support shaft, and a holding portion is biased apart by the double torsion spring provided between the base member and the opening/closing member. The base member has a pair of the shaft bearings which compresses and holds the double torsion spring therebetween, positioning pieces which position the double torsion spring with respect to a direction parallel to the base member within directions orthogonal to the axial core directions of wound portions of the double torsion spring, and holes which are respectively defined between the shaft bearings and the positioning pieces and cause the tips of the double torsion spring to be inserted therethrough.

Abstract: A radio receiver having a plurality of features programmable by a user, the data relating to the programmable features defining a set-up configuration. The radio receiver includes a housing and an auxiliary memory disposed within the housing which stores a plurality of set-up configurations. A working memory is also disposed within the housing and is configured to store the set-up configuration in use by the radio receiver.

Abstract: A receiver input circuit comprises an R-? type low-pass filter, a small-capacitance type coupling capacitor element and a parallel tuning circuit. The low-pass filter has an inductor element and a first capacitor element both connected in series, and a shunt-connected second capacitor element. The first and second capacitor elements are equivalent to ones obtained by dividing a normal shunt-connected capacitor element into two. A total capacitance value thereof is selected equal to the capacitance value of the normal shunt-connected capacitor element. The parallel tuning circuit makes use of a tuning first variable capacitance type capacitor element. A second variable capacitance type capacitor element is used for the small-capacitance type coupling capacitor element.

Abstract: With the objective of providing a scanning receiver capable of capturing a target radio wave in an extremely short period of time by use of a simple constituting means, a plurality of wide frequency division bands in which a full frequency range is divided into predetermined frequency ranges are set and the field intensities of received radio waves are retrieved using the output of an intermediate frequency amplifier circuit over the set wide frequency division bands in order. Further, when a received radio wave having a field intensity greater than or equal to a prescribed level is obtained upon the above retrieval, receive frequencies are swept from one end of each of the wide frequency division bands to the other end thereof. When a target radio wave can be captured upon the above sweeping, transition to the operation of receiving the target radio wave is performed.

Abstract: A radio receiver having a plurality of features programmable by a user, the data relating to the programmable features defining a set-up configuration. The radio receiver includes a housing and an auxiliary memory disposed within the housing which stores a plurality of set-up configurations. A working memory is also disposed within the housing and is configured to store the set-up configuration in use by the radio receiver.

Abstract: In demodulation of a FSK signal, a circuit for detecting a center level of said signal and correcting an error thereof is provided. Said circuit can accomplish the detection of the center level correctly always even if there exist cords with various lengths in a length of “1” or “0” of a synchronizing signal at beginning of communication and during communication, and yet frequency variation happens at that time. Said circuit has sample hold circuits SH1 and SH2 each of which are provided so as to correspond to “1” and “0” of an input demodulated data signal. In said circuit a center level value is an average value of voltages held in said sample hold circuits when said signal changes from “1” to “0” or “0” to “1” and a center level value is obtained by adding or subtracting a voltage of ½ of difference between two hold voltages held in another sample hold circuit SH3 to or from a hold voltage in a receiving side at present time when said signal keeps “1” or “0” continuously.

Abstract: With the objective of providing a scanning receiver capable of capturing a target radio wave in an extremely short period of time by use of a simple constituting means, a plurality of wide frequency division bands in which a full frequency range is divided into predetermined frequency ranges are set and the field intensities of received radio waves are retrieved using the output of an intermediate frequency amplifier circuit over the set wide frequency division bands in order. Further, when a received radio wave having a field intensity greater than or equal to a prescribed level is obtained upon the above retrieval, receive frequencies are swept from one end of each of the wide frequency division bands to the other end thereof. When a target radio wave can be captured upon the above sweeping, transition to the operation of receiving the target radio wave is performed.

Abstract: There is provided a negative impedance converter, which has negative impedance conversion function by widening the available range of a generalized impedance converter. A generalized impedance converter is composed of two operational amplifiers Q1 and Q2 and four series-connected first to fifth impedance elements Z1 to Z4. The four impedance elements included in the generalized impedance converter are all set as the same resistor R1, and an impedance element Z6 is connected between the intermediate point B of the series-connected impedance elements and the ground. The magnitude of the impedance element Z6 is set smaller than that of load impedance element Z5. By doing so, the input impedance Z11? becomes negative, and the kind of the impedance is determined depending on the kind of the impedance elements Z5 and Z6.

Abstract: In order to provide a negative resistance circuit which is not influenced by means of change of temperature and source voltage, etc., operates stably and has simple circuit construction, a first stage circuit of the negative resistance circuit is a collector-emitter dividing type amplifying circuit comprising of a npn transistor and a second stage circuit thereof is an emitter earth type amplifying circuit comprising of a pnp transistor. A collector output of the pnp transistor is connected to a base of the npn transistor to constitute a positive feedback path and is divided and is connected to an emitter of the npn transistor to constitute a negative feedback path. An amplification factor A of the emitter earth type amplifying circuit and voltage dividing ratio ? is set to be (1+A?)<A.

Abstract: A frequency scanning receiver minimizes the time needed for setting the frequency of a phased lock loop of a first local oscillator. The frequency scanning receiver is configured so that when the reference frequency of the PLL of the first local oscillator has been set at a high frequency, and the frequency error is less than the second IF, the frequency error is controlled to be zero by the control circuit switching the frequency of a second local oscillator or third local oscillator to an appropriate frequency using an output of a frequency discriminator.

Abstract: Selectivity Q of a tuning circuit is maximized by using a negative resistance circuit that is not influenced significantly by changes in conditions such as temperature, source voltage, etc. The tuning circuit operates stably and is constituted by a series resonance circuit and the negative resistance circuit connected thereto. The negative resistance circuit can be a C-E dividing type circuit including a npn transistor as a first stage circuit and an emitter earth type amplifying circuit including a pnp transistor as a second stage circuit. A collector output of the pnp transistor is connected to an emitter of the npn transistor to constitute a negative feedback circuit and the collector output is divided and connected to a base of the npn transistor to constitute a positive feedback circuit. Selectivity Q is improved by the negative resistance circuit provided by the negative feedback circuit.

Abstract: A circuit for detecting and correcting a center level is constituted for when the length of a code of “1” or “0” in an FSK signal is extremely long and superimposed with a frequency fluctuation of a transmitter/receiver. This circuit has sample value holding circuits exclusive to “1” and “0” of an input demodulation data signal. After a difference voltage between both sample values is once converted to a digital code in an ADA converter, the converted code is re-converted to an analog value, thereby holding the value digitally. When “1” s repeat, the hold voltage to “1” is updated to new values and simultaneously a voltage obtained by subtracting the difference voltage from the above-described voltage is applied to the holding circuit for “0” to update the value in the holding circuit. Also, when “0”s repeat, the processing proceeds in reverse and the holding circuit for “1” is updated with a voltage obtained by adding the difference voltage to the hold voltage.

Abstract: A tuning circuit using a negative resistance circuit for compensating an equivalent series resistance component thereof is provided. The negative resistance circuit has simple circuit construction and design and adjustment thereof is easy. The tuning circuit comprises a series resonance circuit and a negative resistance circuit connected to the series resonance circuit in series. In the negative resistance circuit, a first transistor constitutes an inverse amplifier by providing a resistor in an emitter circuit thereof and a second transistor constitutes an emitter follower circuit. A positive feedback circuit is constituted by feeding back an output of the emitter follower circuit to an emitter circuit of the first transistor and a negative feedback circuit is constituted by feeding back an output terminal to a base circuit of the first transistor. Thus a negative resistance is produced between this base input terminal and an earth.

Abstract: In order to improve Q of a tuning circuit by using a negative resistance circuit, a tuning circuit wherein a frequency selectivity characteristic and a tuning circuit gain does not vary and are kept constant values even if a tuning frequency is changed, is provided. The tuning circuit is constructed so as to compensate a series resistance component by connecting a negative resistance circuit to a series resonance circuit. The negative resistance circuit includes a differential amplifying circuit having two transistors emitters of which are connected in common, and a low output impedance circuit such as an emitter follower. The low impedance output is fed back to a same phase input side of the differential amplifying circuit directly and also to an inverse phase input side thereof to obtain a negative resistance value at this inverse input terminal.

Abstract: An all pass filter capable of adjusting a center frequency and Q independently from one another, even in a high frequency band. In the filter, an input signal from an input terminal is applied to a gain control circuit and a subtraction circuit, and after a gain of an output signal of a tuning circuit is adjusted by a resistor dividing circuit, it is amplified by a first transistor in phase. An input signal not passing through the tuning circuit is amplified inversely by a second transistor. Since the transistors are connected to a common load resistor, the input signal and the output signal of the tuning circuit are subtracted and a difference voltage therebetween appears at the load resistor.

Abstract: A low pass notch filter has a notch frequency close to &ohgr;o. In the notch filter, an output of an operational amplifier is fed back to an inverting input terminal thereof through a second voltage dividing circuit and a charge/discharge resistor. A first voltage dividing circuit is connected between a signal input terminal and a capacitor which is connected to the inverting input terminal. A signal from the output of the operational amplifier to the second voltage dividing circuit is fed back to a divided output point of the first voltage dividing circuit through a capacitor. At the same time, the signal input terminal provides a signal to the non-inverting input terminal of the operational amplifier through a third voltage dividing circuit.

Abstract: A character input method enables mistake of character input to be diminished, and it is unnecessary to use a rotary type switch in the character input method, therefore it is economical. In a frequency scanning type receiver, when it causes character input to be performed according to a key board section, respective numeric-keys 1 to 0 of 10-key correspond to a plurality of character groups consisting of capital letter, small letter of an alphabet, and numerals arranged in accordance with prescribed order to be determined. CPU/memory section selects the corresponding character group according to a numeric-key which is pressed firstly, next, the CPU/memory section selects corresponding alphabet character, numeral from among character group according to numeric-key which is pressed secondly.

Abstract: A tuning circuit is constructed to set Q of the tuning circuit to a high desired value by using a negative resistance value. The tuning circuit is made to oscillate weakly by using a negative resistance circuit, a voltage-resistance converter and a digital-analog converter. A negative resistance of the negative resistance circuit is scanned by a counter so that two negative resistance values corresponding to an oscillation amplitude and another oscillation amplitude of one half are obtained by analog comparators COMP1 and COMP2. A negative resistance value to be set is operated by an adder/subtracter from a series resistance value corresponding to a desired Q and this value. Scanning is stopped when the negative resistance value is obtained. The tuning circuit can be formed by small size digital integrated circuits.