Abstract: A method for evaluation of a field programmable gate array (FPGA), the method includes: configuring the FPGA to execute, in parallel, an evaluation program and an additional program; wherein an execution of the additional program is being evaluated by the evaluation program; and executing, by the FPGA the evaluation program and the additional program; wherein the executing includes receiving, by a memory controller of the FPGA, captured signals from multiple points of interest of the FPGA; and transferring, by the memory controller of the FPGA, at least a portion of the captured signals to at least one memory space of a memory block via memory channels of the FPGA.

Abstract: Device, system, and method of flexible hardware connectivity. For example, a Printed Circuit Board (PCB) system includes: a rigid platform having embedded therein at least one programmable logic device; at least one rigid panel having embedded therein a set of connectors; and a flexible connection to flexibly connect, at a non-straight angel, the programmable logic device to the rigid panel along a folding axis of the rigid panel and the rigid platform, wherein a density of wires of the flexible connection is greater than a density of wires entering at least one of the connectors.