Patents Assigned to GLC SEMI CONDUCTOR GROUP (SH) CO., LTD.
  • Publication number: 20230102875
    Abstract: A manufacturing method of a semiconductor device includes the following steps. A semiconductor structure is formed on a first surface of a silicon substrate. The semiconductor structure has a first surface facing the silicon substrate. At least one outer circuit is bonded to the semiconductor structure. A molding compound layer is formed covering a second surface of the silicon substrate. A part of the molding compound layer is removed for exposing the silicon substrate. The silicon substrate is removed for exposing the first surface of the semiconductor structure.
    Type: Application
    Filed: October 13, 2021
    Publication date: March 30, 2023
    Applicant: GLC SEMI CONDUCTOR GROUP (SH) CO., LTD.
    Inventors: Chi-Ching Pu, Shun-Min Yeh
  • Publication number: 20230053074
    Abstract: A semiconductor device includes at least one active region, a first dielectric layer, a gate structure, and an air void. The active region includes a III-V compound semiconductor layer. The first dielectric layer is disposed on the active region. The gate structure is disposed on the active region, and at least a part of the gate structure is disposed in the first dielectric layer. The air void is disposed in the first dielectric layer, and at least a part of the air void is disposed at two opposite sides of the gate structure in a horizontal direction.
    Type: Application
    Filed: August 12, 2021
    Publication date: February 16, 2023
    Applicant: GLC SEMI CONDUCTOR GROUP (SH) CO., LTD.
    Inventors: Che-Jui Chang, Chi-Ching Pu, Shun-Min Yeh
  • Publication number: 20220286125
    Abstract: A power switch circuit includes an internal node; a first field-effect transistor including a first drain, a first gate and a first source; a second field-effect transistor including a second drain, a second gate and a second source, wherein the first drain is coupled to a voltage supply terminal, the first gate is coupled to the second source, the first source and the second drain are coupled to the internal node, and the second source is coupled to a ground; and a regulating circuit is coupled to the internal node, wherein the regulating circuit is configured to regulate a voltage value of the internal node after the power switch circuit is activated.
    Type: Application
    Filed: December 7, 2021
    Publication date: September 8, 2022
    Applicant: GLC SEMI CONDUCTOR GROUP (SH) CO., LTD.
    Inventors: Kuo-Chang Kao, Chi-Ching Pu, Shun-Min Yeh