Patents Assigned to GLC SEMICONDUCTOR GROUP (CQ) CO., LTD.
  • Patent number: 11411099
    Abstract: A semiconductor device includes a substrate, a first III-V compound layer, a gate electrode, drain trenches, and at least one drain electrode. The drain trenches are disposed and arranged with high integrity. The substrate has a first side and a second side opposite to the first side. The first III-V compound layer is disposed at the first side of the substrate. The gate electrode is disposed on the first III-V compound layer. Each of the drain trenches extends from the second side of the substrate toward the first side of the substrate and penetrates the substrate. The drain trenches are arranged regularly. The drain electrode is disposed in at least one of the drain trenches.
    Type: Grant
    Filed: July 23, 2019
    Date of Patent: August 9, 2022
    Assignee: GLC SEMICONDUCTOR GROUP (CQ) CO., LTD.
    Inventors: Chi-Ching Pu, Shun-Min Yeh
  • Patent number: 10872967
    Abstract: A manufacturing method of a semiconductor device includes the following steps. At least one mesa structure is provided. The mesa structure includes a III-V compound semiconductor layer. A passivation layer is formed on the mesa structure. A gate dielectric layer is formed on the passivation layer, and a gate electrode is formed on the gate dielectric layer. An etching process is performed to the gate dielectric layer for thinning the gate dielectric layer before the step of forming the gate electrode. The thickness of the gate dielectric layer may be modified by the etching process, and the electrical performance of the semiconductor device may be enhanced accordingly.
    Type: Grant
    Filed: July 24, 2019
    Date of Patent: December 22, 2020
    Assignee: GLC SEMICONDUCTOR GROUP (CQ) CO., LTD.
    Inventors: Yi-Chun Shih, Shun-Min Yeh
  • Patent number: 10854734
    Abstract: A manufacturing method of a semiconductor device includes the following steps. A substrate is provided. The substrate has a first side and a second side opposite to the first side. A first III-V compound layer is formed at the first side of the substrate. A drain trench and a contact trench are formed at the second side of the substrate. The drain trench extends from the second side of the substrate toward the first side of the substrate and penetrates the substrate. The contact trench extends from the second side of the substrate toward the first side of the substrate and penetrates the substrate. The drain trench and the contact trench are formed concurrently by the same process. A drain electrode is formed in the drain trench. A back contact structure is formed in the contact trench.
    Type: Grant
    Filed: July 24, 2019
    Date of Patent: December 1, 2020
    Assignee: GLC SEMICONDUCTOR GROUP (CQ) CO., LTD.
    Inventors: Yi-Chun Shih, Shun-Min Yeh