Patents Assigned to Global Advanced Packaging Technology H.K. Limited
  • Patent number: 7098524
    Abstract: An electroplated wire layout for package sawing comprises a substrate with a plurality of chip arrays disposed thereon. A kerf having two scribe lines is disposed between every two chip arrays. Several solder ball pads corresponding to the chip arrays are disposed on a back surface of the substrate. Each solder ball pad has a solder ball electroplated wire extended into a kerf. There is also a kerf electroplated wire disposed in each kerf and above the scribe lines of the kerf in a zigzag way. The kerf electroplated wire is connected with the solder ball pad electroplated wires to achieve electric connection. By changing the shape of the kerf electroplated wire, the kerf electroplated wire can be easily cut off to enhance the yield and reliability and also lower the cost.
    Type: Grant
    Filed: August 5, 2004
    Date of Patent: August 29, 2006
    Assignee: Global Advanced Packaging Technology H.K. Limited
    Inventors: Kai-Chiang Wu, Shaw-Wei Chen
  • Patent number: 7095091
    Abstract: An improved finger structure applied to a packaging stack structure. The packaging stack structure is composed of several layers of chips, each chip is formed several leading wires and several finger sets are connected to the leading wire. Several finger units are formed on a finger set. The shape of these finger units is a strip structure with a bending angle, and the shape of these finger units is along an obverse direction of these leading wires to the finger unit and is changed corresponding to the obverse direction of the finger unit. The present invention can simplify the process and improve the reliability by changing the finger structure and continuously using the obverse bonding process to avoid the striking strength of the reverse bonding process.
    Type: Grant
    Filed: July 1, 2004
    Date of Patent: August 22, 2006
    Assignee: Global Advanced Packaging Technology H.K. Limited
    Inventors: Kai-Chiang Wu, Shaw-Wei Chen
  • Patent number: 7091590
    Abstract: The invention provides a multiple stacked-chip packaging structure, including: at least one lower layer chip located on a substrate, wherein a plurality of wires are electrically connected to the bonding pads on the lower layer chip and to the substrate; at least one carrier cap provided on the lower layer chip to provide an accommodating space to the bonding pads and the wires on the lower layer chip; at least one upper layer chip provided on the carrier cap, wherein a plurality of wires are electrically connected to the bonding pads on the upper layer chip and to the substrate; and finally, a Molding Compound used to wrap up the foregoing components.
    Type: Grant
    Filed: August 11, 2003
    Date of Patent: August 15, 2006
    Assignee: Global Advanced Packaging Technology H.K. Limited
    Inventors: Wan Hua Wu, Kai Chiang Wu
  • Patent number: 6937477
    Abstract: The present invention provides an improved structure of gold fingers, which is to redesign a conventional gold finger on a packaging substrate into a gold finger set that contains a plurality of gold finger units. Between each single gold finger unit, there exists an electrical connection. Therefore, in the structure of stacked-chip packaging, each wire that is connected through wire bonding on the same gold finger of each layer chip can separately perform wire bonding on different gold finger units of the same gold finger set. Due to the improvement on the gold finger structure, the present invention can prevent the adhesive on a chip from flowing along the wire bonding path of a layer chip and smearing the whole gold finger. Thus, other layer chips can be prevented from being unable to perform wire bonding.
    Type: Grant
    Filed: January 21, 2004
    Date of Patent: August 30, 2005
    Assignee: Global Advanced Packaging Technology H.K. Limited
    Inventor: Kai-Chiang Wu
  • Patent number: 6933592
    Abstract: A substrate structure capable of reducing the package singular stress comprises a substrate having a plurality of substrate units. A molding gate is provided at a corner of each substrate unit. A plurality of slots are provided at the periphery of each substrate unit. A connection portion is provided between every two adjacent slots. These connection portions include a first connection portion and two second connection portions. The first connection portion is located at each molding gate. The second connection portions are located between two adjacent corners of each substrate unit, and opposite to each other. Through appropriate position arrangement of the connection portions, the molding gate stress at the corner of each package unit can be reduced. Moreover, the situation of breakage of trace in the substrate and peeling of molding compound from the substrate can be avoided.
    Type: Grant
    Filed: December 19, 2003
    Date of Patent: August 23, 2005
    Assignee: Global Advanced Packaging Technology H.K. Limited
    Inventors: Virgil Liao, Ben Weng, Jai Yi Wang