Abstract: A device includes a semiconductor die. The semiconductor die includes a plurality of semiconductor layers disposed on a GaAs substrate, including a first semiconductor layer having a first band-gap and a second semiconductor layer having a second band-gap. The semiconductor die further includes a contact layer disposed epitaxially upon the first semiconductor layer. The contact layer has a thickness that is less than a critical thickness. The second semiconductor layer is epitaxially disposed upon the contact layer. The contact layer has a third band-gap that is less than the first band-gap and the second band-gap. The semiconductor die further includes a conductive layer disposed upon the contact layer to form an ohmic contact. The conductive layer comprises one or more metal layers compatible with silicon processing techniques.
Type:
Grant
Filed:
August 19, 2014
Date of Patent:
February 23, 2016
Assignee:
GLOBAL COMMUNICATION SEMICONDUCTORS, INC.
Inventors:
Yuefei Yang, Shing-Kuo Wang, Liping D. Hou
Abstract: A semiconductor device having a tunable capacitance is disclosed, comprising a substrate, a semiconductor base layer comprising a first semiconductor material having a first band-gap, and a plurality of successive semiconductor layers positioned between the substrate and the semiconductor base layer. The plurality of successive semiconductor layers includes a tuning layer comprising a second semiconductor material having a second band-gap larger than the first band-gap. Furthermore, the tuning layer has a non-uniform doping profile with doping concentration that varies in accordance with distance from a surface of the tuning layer proximal to the semiconductor base layer. The tunable capacitance of the semiconductor device varies in accordance with an applied voltage between the base layer and one of the successive semiconductor layers.
Type:
Grant
Filed:
October 31, 2012
Date of Patent:
May 6, 2014
Assignee:
Global Communication Semiconductors, Inc.