Abstract: Systems and methods of testing integrated circuits independent of chip package configuration include or utilize a socket configured to receive a device under test (DUT), wherein the socket includes a plurality of input pins and a plurality of output pins, and wherein the DUT includes a plurality of device pins; a wireless communication device configured to wirelessly transmit information on the DUT to a server device operating a machine learning (ML) model, and wirelessly receive response data generated by the ML model from the server device, the response data including at least one of a pin configuration information of the DUT or a timing configuration information of the DUT; and a switch array configured to route respective ones of the plurality of device pins to corresponding ones of the plurality of output pins based on the response data.
Type:
Grant
Filed:
October 26, 2023
Date of Patent:
December 16, 2025
Assignees:
UNIVERSITY OF SOUTH FLORIDA, GLOBAL ETS, LLC