Patents Assigned to GLOBAL POWER TECHNOLOGIES GROUP
  • Methods of reducing the electrical and thermal resistance of SiC substrates and device made thereby
    Patent number: 10879388
    Abstract: A power semiconductor device includes a silicon carbide substrate and at least a first layer or region formed above the substrate. The silicon carbide substrate has a pattern of pits formed thereon. The device includes a stop layer that is disposed at least in part laterally between the pits. The device further comprising an ohmic metal disposed at least in the pits to form low-resistance ohmic contacts, wherein the ohmic metal contacts at least parts of the stop layer.
    Type: Grant
    Filed: December 5, 2019
    Date of Patent: December 29, 2020
    Assignees: Purdue Research Foundation, GLOBAL POWER TECHNOLOGIES GROUP
    Inventor: James Albert Cooper, Jr.
  • Methods of reducing the electrical and thermal resistance of SiC substrates and devices made thereby
    Patent number: 10505035
    Abstract: A power semiconductor device includes a silicon carbide substrate and at least a first layer or region formed above the substrate. The silicon carbide substrate has a pattern of pits formed thereon. The device further comprising an ohmic metal disposed at least in the pits to form low-resistance ohmic contacts.
    Type: Grant
    Filed: October 2, 2017
    Date of Patent: December 10, 2019
    Assignees: Purdue Research Foundation, GLOBAL POWER TECHNOLOGIES GROUP
    Inventor: James Albert Cooper, Jr.