Abstract: An adaptive preceding system is implemented within a data communications system in order to precode data to track changes in a communications channel. The adaptive precoding system initializes a set of precoder values within a precoder filter of a transmitter during an initialization phase. The precoder filter is used to create a precoding signal that is combined with a transmission data signal in order to compensate for distortions on a communications channel. During a communications phase, a decision feedback equalizer generates equalizer coefficients that correspond to changes on the communications channel. The equalizer coefficients are periodically transmitted to a converter within the transmitter over a secondary channel. The converter determines a new set of precoder values that compensate for the changes in the communications channel and slowly updates the values in the precoder filter until they match the new set of precoder values.

Abstract: The invention provides a transceiver which is preferably used for high speed communications between a customer location and a central office over a subscriber line. The transceiver uses a pseudorandom noise generator both to provide a correlation for a complementary transceiver to use in achieving synchronization and as a way to transmit data in an extremely robust fashion. In addition, the transceiver uses frequency domain multiplexing so that downstream data and upstream data are transmitted by their respective transceivers in completely separate and distinct frequency bands. In order to achieve high data transfer rates, the transceivers can operate in an asymmetrical manner, whereby either (but, typically, the central office) transceiver can transmit data at a higher rate than the other transceiver.

Abstract: The present invention is drawn to a system and method for transmitting a data signal using digital subscriber loops in an expanded frequency band. According to the present invention, an encoder receives a data signal to be transmitted to a second modem. The encoder generates both an in-phase and a quadrature signal based on the data signal. Both the in-phase signal and the quadrature signals are then processed by a signal precoder in preparation for transmission across the channel. Next, the in-phase and quadrature signals are processed by digital filters to produce signals of limited bandwidth which can be transmitted across the channel. The coefficients of the digital filter are chosen such that the resulting filtered in-phase and quadrature signals are transmitted in an expanded bandwidth. The quadrature signal is filtered so as to be orthogonal to the in-phase signal. Thereafter the filtered signals are added and then converted to an analog signal which is transmitted to the second modem.

Abstract: A improved multilevel encoder and associated method is described. The encoder includes a device (e.g., serial to parallel converter) for presenting a plurality of information bits in parallel format. A symbol selector having a plurality of inputs and an output, the symbol selector being configured to output a symbol that is defined by a signal constellation, whereby the symbol is defined by a magnitude and phase that are uniquely associated with a state of the plurality of inputs. A first encoder has an input and an output, the input of the first encoder being associated with at least one of the outputs of the device and the output being associated with at least one of the inputs of the symbol selector, the first encoder configured by a code defining a four-way set partition of the signal constellation.

Abstract: Apparatus that realizes a substantial advantage by employing implied interleaving to create a systematic interleaver, that can result in a superior block error rate compared to the current data interleaving techniques in which uncorrected error bursts are distributed by the deinterleaver. The disclosed principles lead to a embodiments that essentially eliminate transmitter memory regardless of the interleaving approach employed. By way of example, block interleaving (regular or random), convolutional interleaving (regular and random) and product interleaving approaches are described. In implied interleaving, all incoming data is treated as if it is pre-interleaved and transmitted directly to its destination without alteration to its sequence, and essentially without delay.

Abstract: The present invention provides a higher order filter with low sensitivity to component values and to a method of designing the same. The higher order filter is constructed of second and/or third order filter circuits which have been desensitized with respect to component values and gain by impedance tapering the filter circuits. The filter circuits are impedance tapered by successively scaling the resistors and/or capacitors from left to right to minimize loading on the first filter section and to maximize the quality factor of the passive pole. The impedance of the filter sections is increased from left to right by increasing the resistor values and/or by decreasing the capacitor values from left to right. Once the lower order filter circuits have been designed, they are cascaded to provide a higher order filter with low sensitivity to component values and gain.

Abstract: The present invention provides a second order filter with low sensitivity to component values and a method for designing the filter. The filter is impedance tapered by increasing the impedance of the filter circuit from left to right so as to minimize loading on the first ladder section and to maximize the pole quality factor of the first section. The filter is designed so that the value of the resistor of the second ladder section of the filter is equal to the resistor value of the first section multiplied by a scaling factor r, which is greater than 1. The capacitor of the second ladder section has a value equal to the value of the capacitor of the first ladder section divided by a tapering factor .rho., which is also greater than 1. In accordance with the preferred embodiment, the capacitor and resistor tapering factors are equal, i.e., r=.rho.>1.

Abstract: Apparatus that realizes a substantial advantage by employing implied interleaving to create a systematic interleaver, that can result in a superior block error rate compared to the current data interleaving techniques in which uncorrected error bursts are distributed by the deinterleaver. The disclosed principles lead to a embodiments that essentially eliminate transmitter memory regardless of the interleaving approach employed. By way of example, block interleaving (regular or random), convolutional interleaving (regular and random) and product interleaving approaches are described. In implied interleaving, all incoming data is treated as if it is pre-interleaved and transmitted directly to its destination without alteration to its sequence, and essentially without delay.

Abstract: The problem of error propagation is resolved by using the communications channel to adapt a pre-equalizer of a transmitter, in response to changes in the communications channel. In particular, the pre-equalizer adapts to changes in the communications channel by processing an error signal that is communicated over a reverse channel by a corresponding receiver.

Abstract: The invention provides a transceiver which is preferably used for high speed communications between a customer location and a central office over a subscriber line. The transceiver uses a pseudorandom noise generator both to provide a correlation for a complementary transceiver to use in achieving synchronization and as a way to transmit data in an extremely robust fashion. In addition, the transceiver uses frequency domain multiplexing so that downstream data and upstream data are transmitted by their respective transceivers in completely separate and distinct frequency bands. In order to achieve high data transfer rates, the transceivers can operate in an asymmetrical manner, whereby either (but, typically, the central office) transceiver can transmit data at a higher rate than the other transceiver.

Abstract: In a digital audio broadcasting (DAB) system having a radio-frequency (RF) transmitter and a corresponding RF receiver, a system and method for providing improved frame synchronization is provided. In accordance with the preferred embodiment, the RF transmitter formats a DAB signal into a sequence of frames, each frame having a header with a predefined grouping of psuedo-random number sequences comprising 100 symbols. Of these 100 symbols, 86 symbols of the header preferable are used for frame synchronization and characterization of a communications channel, while the remaining 14 symbols are used for interleaver and data synchronization in an interleaved fashion. The formatted DAB signal, including the frame sequences, is transmitted to the receiver preferably using quadrature phase-shift keying modulation. At the receiver, a correlator, utilizing a synchronization detection algorithm, is generally designed to match a predetermined symbol pattern within the received signal.

Abstract: In a multi-channel receiver system embodying the invention, a "trained" receiver channel which is active and propagating data signals may be used to train any other receiver channel. Each receiver channel of the system has an input and an output, with each input for receiving a different portion of an original data signal. Each receiver channel includes adaptive filter coupled between its input and its output for propagating the signals received at its input to its output. In accordance with the invention, a first trained receiver channel is used to train a second receiver channel by coupling the output of the first receiver channel to the output of the second receiver channel for training the adaptive filter of the second receiver channel. The training of the second receiver is completed by transmitting the same data signal to the first and second receiver channels.

Abstract: An "N" channel receiver system includes "N" A/D converters, one per channel, sampling the data received by their respective channels. The sampling rate of the A/D converters is controlled by a sampling clock signal generated by a timing recovery circuit. One rate of the sampling clock is a function of a timing signal applied to the timing recovery circuit. The system may be configured so that each channel produces N distinct timing signals, corresponding to the data signals received by each one of the N channels. The N distinct timing signals are coupled to a mechanism configured to selectively couple one of the N distinct timing signals to the timing recovery circuit. In a preferred embodiment, the signal-to-noise ratio (SNR) of the N received signals is sensed and the timing signal of the channel having the highest SNR is coupled via the controllable.

Abstract: In a receiver system embodying the invention, the amplitude of the input signal is sensed so that when it exceeds a predetermined level, the adaptation of adaptive filters employed in the receiver is inhibited. In one embodiment of the invention the adaptation is inhibited for the extent of time that the sensed signal exceeds the predetermined level. In another embodiment of the invention, the adaptation is inhibited for a fixed period of time whenever the sensed signal exceeds the predetermined level. In still another embodiment of the invention, where the noise impulse has some repetitive pattern, an inhibiting signal is generated in anticipation of a repetitive noise impulse to inhibit adaptation of the adaptive filters during the period of time ("window") the noise impulse occurs.