Patents Assigned to Gold Circuit Electronics Ltd.
  • Publication number: 20240397631
    Abstract: A method of a segmented electroplating golden finger includes a substrate, which is drilled and plated, and including: a. first etching, forming circuit patterns and gold finger parts on the substrate, the gold finger part is composed of several mutually independent gold fingers, a lead channel is provided between the two adjacent gold fingers, and a side lead connected to each gold finger is arranged on the lead channel; b. solder resist, solder resist protection for the etched substrate; c. the gold fingers partly covered with a wet film; d. parallel exposure to perform image transfer; e. gold finger electroplating; f. adhesive glue; g. second etching, removing the leads, completing a finished product.
    Type: Application
    Filed: October 31, 2023
    Publication date: November 28, 2024
    Applicant: Gold Circuit Electronics Ltd.
    Inventor: Chen-Tse Yang
  • Patent number: 11204242
    Abstract: A measurement system is provided, including a measurement machine and a computer. The measurement machine is configured to measure a thickness T1 of a to-be-tested circuit board and a drilling depth D1 of the to-be-tested circuit board. The computer calculates a length S1 of a residual conductive portion in a back drilled hole of the to-be-tested circuit board according to a thickness T of a reference circuit board, a drilling depth D of the reference circuit board, a length S of a residual conductive portion in a back drilled hole of the reference circuit board, the thickness T1 of the to-be-tested circuit board and the drilling depth D1 of the to-be-tested circuit board.
    Type: Grant
    Filed: September 2, 2020
    Date of Patent: December 21, 2021
    Assignee: Gold Circuit Electronics Ltd.
    Inventors: Tien-Chieh Kang, Chih-Ming Tsai
  • Publication number: 20210356264
    Abstract: A measurement system is provided, including a measurement machine and a computer. The measurement machine is configured to measure a thickness T1 of a to-be-tested circuit board and a drilling depth D1 of the to-be-tested circuit board. The computer calculates a length S1 of a residual conductive portion in a back drilled hole of the to-be-tested circuit board according to a thickness T of a reference circuit board, a drilling depth D of the reference circuit board, a length S of a residual conductive portion in a back drilled hole of the reference circuit board, the thickness T1 of the to-be-tested circuit board and the drilling depth D1 of the to-be-tested circuit board.
    Type: Application
    Filed: September 2, 2020
    Publication date: November 18, 2021
    Applicant: Gold Circuit Electronics Ltd.
    Inventors: Tien-Chieh Kang, Chih-Ming Tsai
  • Patent number: 10820423
    Abstract: A fabrication method of a circuit includes drilling holes in a substrate, so as to form a plurality of first opening holes and second opening holes in the substrate. A cover film is attached onto the substrate, so as to cover the first opening holes and the second opening holes. A portion of the cover film covering the first opening holes is removed, so as to expose the first opening holes. The first opening holes are filled.
    Type: Grant
    Filed: August 17, 2017
    Date of Patent: October 27, 2020
    Assignee: Gold Circuit Electronics Ltd.
    Inventors: Chih-Hai Yu, Kuo-Wei Lo, Cheng-Hsiao Lin
  • Publication number: 20180376601
    Abstract: A fabrication method of a circuit includes drilling holes in a substrate, so as to form a plurality of first opening holes and second opening holes in the substrate. A cover film is attached onto the substrate, so as to cover the first opening holes and the second opening holes. A portion of the cover film covering the first opening holes is removed, so as to expose the first opening holes. The first opening holes are filled.
    Type: Application
    Filed: August 17, 2017
    Publication date: December 27, 2018
    Applicant: Gold Circuit Electronics Ltd.
    Inventors: Chih-Hai Yu, Kuo-Wei Lo, Cheng-Hsiao Lin
  • Patent number: 7234230
    Abstract: A composite circuit board comprises multiple soft panels evenly mounted on a rigid panel. The soft panels are positioned on the rigid panel in proper alignment via locating pins on the rigid panel and corresponding holes in the soft panels. The soft panels are securely bonded to the rigid panel to form the composite circuit boards. The smaller size of the soft panels minimizes the alignment problems caused by the different heat expansion rates of the soft panel and the rigid panel.
    Type: Grant
    Filed: December 27, 2005
    Date of Patent: June 26, 2007
    Assignee: Gold Circuit Electronics Ltd.
    Inventors: Ting-Hao Lin, Chung-Yuan Chen