Abstract: A circuit is provided having a plurality of flip flops (F.sub.l -F.sub.n) that are serially connected for executing sequential operations under the control of a clock. The outputs (Q.sub.l -Q.sub.n) of the flip flops (F.sub.l -F.sub.n) are connected to corresponding inputs (I.sub.l -I.sub.n) of a binary decoder and the sequential outputs (O.sub.1 -O.sub.2) of the binary decoder execute the sequential selection. However, when an optional operation is selected during the execution of the sequential selection, a first switch switches the state of the clock terminals of the flip flops to a "high level" so that the flip flops memorize the state of the interrupted sequence selection. Subsequently, the option selection is carried out by the manipulation of a set of switches. Upon completion of the option selection, the first switch is switched back so that the execution of the interrupted sequence selection continues.