Abstract: An enhanced differential pair amplifier circuit 28, 30 is described which provides a linearity correction technique. The linearity correction technique is designed to compensate for nonlinearities in the base-to-emitter output voltage of each transistor in a differential pair of transistors over the dynamic input range of the amplifier. The present invention comprises the inclusion of compensation diodes or transistors 42, 44 in the load circuit of each input transistor in the differential pair to compensate for nonlinearities.