Abstract: Certain example embodiments relate to software test with automated configurable harness capabilities. Certain example embodiments automatically generate harnesses and properly encoded seed inputs by recording the input operations of a system under test (SUT), identifying the processes to be fuzz tested, generating seed inputs and a manifest describing the SUT's input vectors, and generating the harness to effectively feed derived (and potentially “malformed”) input to the SUT. The techniques described herein may be used to test a computer system, e.g., to probe for potential vulnerabilities.
Type:
Grant
Filed:
July 2, 2021
Date of Patent:
February 21, 2023
Assignee:
GRAMMATECH, INC.
Inventors:
David Gordon Melski, Eric Rizzi, Vlad Folts
Abstract: Systems, methods, and computer readable medium described herein relate to techniques for characterizing and/or anomaly detection in integrated circuits such as, but not limited to, field programmable gate arrays (FPGAs) and application-specific integrated circuits (ASICs). In one example aspect of certain example embodiments, a fully digital technique relies on the pulse width of signals propagated through a path under test. In another example aspect, the re-configurability of the integrated circuit is leveraged to combine the pulse propagation technique with a delay characterization technique to yield better detection of certain type of Trojans and the like. Another example aspect provides for running the test through reconfigurable path segments in order to isolate and identify anomalous circuit elements. Yet another example aspect provides for performing the characterization and anomaly detection without requiring golden references and the like.
Abstract: Certain example embodiments described herein relate to techniques for automatically protecting, or hardening, software against exploits of memory-corruption vulnerabilities. The techniques include arranging a plurality of guard regions in the memory in relation to data objects formed by the application program, identifying an access by the application program to a guard region arranged in the memory as a disallowed access, and modifying the execution of the application program in response to the identifying, the modifying being in order to prevent exploitation of the memory and/or to correctly execute the application program.
Type:
Grant
Filed:
April 30, 2018
Date of Patent:
April 27, 2021
Assignee:
GrammaTech, Inc.
Inventors:
David Gordon Melski, Nathan Taylor Kennedy, Drew Christian Dehaas
Abstract: Certain example embodiments relate to techniques for generating reassemblable disassemblies of binaries using declarative logic. A declarative logic programming language (e.g., Datalog) is used to compile reverse engineering, binary analysis, and disassembly rules into a format applicable to an executable program, yielding disassembly of that program. Datalog, for example, can be used as a query language for deductive databases, to facilitate this approach. Certain example embodiments thus involve (1) preparation of an executable for Datalog analysis, (2) inference rules and the application of Datalog for program analysis, including the application of Datalog to the domain of binary reverse engineering and analysis, and (3) the collection of assembly code from the results of the Datalog analysis. These rules can include both “hard rules” and “soft rules” or heuristics, even though standard Datalog does not support the latter.
Type:
Grant
Filed:
November 30, 2018
Date of Patent:
July 7, 2020
Assignee:
GRAMMATECH, INC.
Inventors:
Eric Michael Schulte, Antonio Enrique Flores Montoya
Abstract: Systems, methods and computer readable medium described herein relate to techniques for automatic type inference from machine code. An example technique includes receiving a machine code of a program, generating an intermediate representation of the machine code, generating a plurality of type constraints from the intermediate representation, generating one or more inferred types based at least upon the plurality of type constraints, converting the generated inferred types to C types, updating the intermediate representation by applying the inferred types to the intermediate representation, and outputting said inferred types, said converted C types, and/or at least a portion of the updated intermediate representation.
Type:
Grant
Filed:
December 29, 2016
Date of Patent:
September 24, 2019
Assignee:
GRAMMATECH, INC.
Inventors:
Matthew Noonan, Alexey Loginov, David Cok
Abstract: Certain example embodiments described herein relate to techniques for automatically protecting, or hardening, software against exploits of memory-corruption vulnerabilities. The techniques include arranging a plurality of guard regions in the memory in relation to data objects formed by the application program, identifying an access by the application program to a guard region arranged in the memory as a disallowed access, and modifying the execution of the application program in response to the identifying, the modifying being in order to prevent exploitation of the memory and/or to correctly execute the application program.
Type:
Grant
Filed:
July 21, 2015
Date of Patent:
June 5, 2018
Assignee:
GrammaTech, Inc.
Inventors:
David Gordon Melski, Nathan Taylor Kennedy, Drew Christian Dehaas