Patents Assigned to Graphensic AB
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Patent number: 11950515Abstract: The present invention relates to a method for connecting an electrical contact to a nanomaterial carried by a substrate. At least one layer of soluble lithography resist is provided on the nanomaterial. An opening in the at least one layer of resist exposes a surface portion of the nanomaterial. At least a portion of the exposed surface portion of the nanomaterial is removed to thereby expose the underlying substrate and an edge of the nanomaterial. A metal is deposited on at least the edge of the nanomaterial and the exposed substrate such that the metal forms an electrical contact with the nanomaterial. Removing at least a portion of the soluble lithography resist from the nanomaterial such that at least a portion of the two-dimensional material is exposed.Type: GrantFiled: December 6, 2018Date of Patent: April 2, 2024Assignee: GRAPHENSIC ABInventors: Samuel Lara-Avila, Sergey Kubatkin, Hans He
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Patent number: 11908926Abstract: The present invention relates to a method for assembling molecules on the surface of a two-dimensional material formed on a substrate, the method comprises: forming a spacer layer comprising at least one of an electrically insulating compound or a semiconductor compound on the surface of the two-dimensional material, depositing molecules on the spacer layer, annealing the substrate with spacer layer and the molecules at an elevated temperature for an annealing time duration, wherein the temperature and annealing time are such that at least a portion of the molecules are allowed to diffuse through the spacer layer towards the surface of the two-dimensional material to assemble on the surface of the two-dimensional material. The invention also relates to an electronic device.Type: GrantFiled: February 3, 2023Date of Patent: February 20, 2024Assignee: GRAPHENSIC ABInventors: Samuel Lara-Avila, Hans He, Sergey Kubatkin
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Publication number: 20230187544Abstract: The present invention relates to a method for assembling molecules on the surface of a two-dimensional material formed on a substrate, the method comprises: forming a spacer layer comprising at least one of an electrically insulating compound or a semiconductor compound on the surface of the two-dimensional material, depositing molecules on the spacer layer, annealing the substrate with spacer layer and the molecules at an elevated temperature for an annealing time duration, wherein the temperature and annealing time are such that at least a portion of the molecules are allowed to diffuse through the spacer layer towards the surface of the two-dimensional material to assemble on the surface of the two-dimensional material. The invention also relates to an electronic device.Type: ApplicationFiled: February 3, 2023Publication date: June 15, 2023Applicant: GRAPHENSIC ABInventors: Samuel LARA-AVILA, Hans HE, Sergey KUBATKIN
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Patent number: 11575033Abstract: The present invention relates to a method for assembling molecules on the surface of a two-dimensional material formed on a substrate, the method comprises: forming a spacer layer comprising at least one of an electrically insulating compound or a semiconductor compound on the surface of the two-dimensional material, depositing molecules on the spacer layer, annealing the substrate with spacer layer and the molecules at an elevated temperature for an annealing time duration, wherein the temperature and annealing time are such that at least a portion of the molecules are allowed to diffuse through the spacer layer towards the surface of the two-dimensional material to assemble on the surface of the two-dimensional material. The invention also relates to an electronic device.Type: GrantFiled: December 6, 2018Date of Patent: February 7, 2023Assignee: GRAPHENSIC ABInventors: Samuel Lara-Avila, Hans He, Sergey Kubatkin
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Publication number: 20210043830Abstract: The present invention relates to a method for connecting an electrical contact to a nanomaterial carried by a substrate. At least one layer of soluble lithography resist is provided on the nanomaterial. An opening in the at least one layer of resist exposes a surface portion of the nanomaterial. At least a portion of the exposed surface portion of the nanomaterial is removed to thereby expose the underlying substrate and an edge of the nanomaterial. A metal is deposited on at least the edge of the nanomaterial and the exposed substrate such that the metal forms an electrical contact with the nanomaterial. Removing at least a portion of the soluble lithography resist from the nanomaterial such that at least a portion of the two-dimensional material is exposed.Type: ApplicationFiled: December 6, 2018Publication date: February 11, 2021Applicant: GRAPHENSIC ABInventors: Samuel LARA-AVILA, Sergey KUBATKIN, Hans HE
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Publication number: 20200328295Abstract: The present invention relates to a method for assembling molecules on the surface of a two-dimensional material formed on a substrate, the method comprises: forming a spacer layer comprising at least one of an electrically insulating compound or a semiconductor compound on the surface of the two-dimensional material, depositing molecules on the spacer layer, annealing the substrate with spacer layer and the molecules at an elevated temperature for an annealing time duration, wherein the temperature and annealing time are such that at least a portion of the molecules are allowed to diffuse through the spacer layer towards the surface of the two-dimensional material to assemble on the surface of the two-dimensional material. The invention also relates to an electronic device.Type: ApplicationFiled: December 6, 2018Publication date: October 15, 2020Applicant: GRAPHENSIC ABInventors: Samuel LARA-AVILA, Hans HE, Sergey KUBATKIN
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Patent number: 9157888Abstract: A field effect transistor (20) for chemical sensing, comprising an electrically conducting and chemically sensitive channel (2) extending between drain (5) and source (6) electrodes. A gate electrode (7) is separated from the channel (2) by a gap (10) through which a chemical to be sensed can reach the channel (2) which comprises a continuous monocrystalline graphene layer (2a) arranged on an electrically insulating graphene layer substrate (1). The graphene layer (2a) extends between and is electrically connected to the source electrode (5) and the drain electrode (6). The substrate supports the graphene layer, allowing it to stay 2-dimensional and continuous, and enables it to be provided on a well defined surface, and be produced and added to the transistor as a separate part. This is beneficial for reproducibility and reduces the risk of damage to the graphene layer during production and after. Low detection limits with low variability between individual transistors are also enabled.Type: GrantFiled: May 5, 2011Date of Patent: October 13, 2015Assignee: GRAPHENSIC ABInventors: Mike Andersson, Lars Hultman, Anita Lloyd Spetz, Ruth Pearce, Rositsa Yakimova
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Patent number: 9150417Abstract: The present disclosure relates to a process for growth of graphene at a temperature above 1400° C. on a silicon carbide surface by sublimation of silicon from the surface. The process comprises heating under special conditions up to growth temperature which ensured that the surface undergoes the proper modification for allowing homogenous graphene in one or more monolayers.Type: GrantFiled: March 23, 2011Date of Patent: October 6, 2015Assignee: Graphensic ABInventors: Rositsa Yakimova, Tihomir Iakimov, Mikael Syvajarvi