Abstract: A memory controller, system and method for storing data blocks in a plurality of physically distinct non-volatile memory devices, each being independently written to or read from. The method includes generating one or more error checking data blocks based upon the plurality of data blocks; and storing the plurality of data blocks and the error checking data block(s) in the distinct physical non-volatile memory devices, with each data block in a different physical memory device. The method links the addresses of the data blocks and the error checking data block(s) in a cyclical link so that any entry to one of the data blocks will result in a link to all of the other data blocks. The memory controller has a processor and a memory for storing programming code for performing the foregoing method.

Abstract: A method of operating a controller for controlling the programming of a NAND memory chip is shown. The NAND memory chip has a plurality of blocks with each block having a certain amount of storage, wherein the amount of storage in each block is the minimum erasable unit. The method comprising storing in a temporary storage a first plurality of groups of data, wherein each of the groups of data is to be stored in a block of the NAND memory chip. Each group of data is indexed to the block with which it is to be stored. Finally, the groups of data associated with the same block are programmed into the same block in the same programming operation.

Abstract: An output buffer circuit for a non-volatile memory comprises an error check circuit, an error correction circuit, a switch circuit, and three storage circuits. The error check circuit receives the plurality of data bits and the plurality of ECC bits from the non-volatile memory to determine if the plurality of data bits need to be corrected and generates a correction signal. The error correction circuit receives the plurality of data bits and the plurality of ECC bits and generates a plurality of corrected data bits in response to the correction signal. A switch enables the output buffer circuit to concurrently performs operations of error check, error correction, and transfer of data bits out of the output buffer circuit on three distinct pluralities of data bits. The switch allows reallocation of storage circuits to different operations without any data transfer.

Abstract: A time domain voltage step down capacitor based circuit has an oscillating circuit for generating a clock signal. The circuit also has a capacitor based charge pump circuit for receiving the clock signal and an input voltage signal having an input current and generates an output voltage signal, less than the input voltage signal and an output current greater than the input current. The circuit further comprises a comparator circuit for receiving the output voltage signal, as a first input signal thereto, and a reference voltage signal as a second input signal thereto and compares the first input signal to the second input signal and generates a control signal in response thereto. Finally the control signal is supplied to the oscillating circuit to control the generating of the clock signal.

Abstract: A removable card for use with a mobile wireless communication device has a processor and a non-volatile memory, connected to the processor. The removable card has electrical connections for connecting to a mobile wireless communicating device for use by a user to access a common carrier network to access a network of interconnected computer networks (“Internet”). The card comprises a processor and a non-volatile memory connected to the processor. The non-volatile memory has two portions: a first portion and a second portion. The first portion is accessible by the provider of the common carrier network with the processor restricting access thereto by the user. The second portion is accessible by the provider of the common carrier network and with the processor granting access thereto to the user for storing user data therein. Finally, the removable card has logic circuit for encoding the user data to produce encrypted user data, for storing in the second portion.

Abstract: A secure removable card has electrical connections for communication therewith. The card comprises a first integrated circuit die, with the first die including a processor. The card has a second integrated circuit die, with the second die including a non-volatile memory for storing a secret key, and a controller for controlling the operation of the non-volatile memory. A bus connects the first die with the second die. The processor can generate a key pair, having a public key portion and a private key portion upon power up, and transfers the public key portion across the bus to the second die. The controller can receive the public key and encrypt the secret key with the public key to generate a first encrypted key, and can transfer the first encrypted key across the bus to the first die.

Abstract: The present invention is related to memory management, and in particular, to methods and systems for accessing and managing nonvolatile, such as in a wireless phone. A wireless phone memory controller is disclosed that, comprises a first interface circuit configured to be coupled to wireless phone nonvolatile memory, a second interface circuit configured to be coupled to wireless phone volatile memory, a first processor interface configured to be coupled to a first wireless phone processor, wherein the first processor interface is configured to provide the first processor with access to the wireless phone volatile memory, a second processor interface configured to be coupled to a second wireless phone processor, and a controller circuit configured to copy at least a portion of wireless phone nonvolatile memory data to the wireless phone volatile memory.