Patents Assigned to GTE Automatic Electric Inc.
  • Patent number: 4598404
    Abstract: A formatted data message for conveying control information from the peripheral processor of one telecommunications switching system to the peripheral processor of at least one other telecommunications switching system is provided. The data message format comprises a first control work including a plurality of control bits, a data bit and a parity bit for the first control word and a plurality of data words, each data word including a parity bit. The data words contain control information to be conveyed to the receiving peripheral processor. A parity word is included which provides parity for an associated plurality of the preceding data and control words.
    Type: Grant
    Filed: December 22, 1983
    Date of Patent: July 1, 1986
    Assignee: GTE Automatic Electric Inc.
    Inventors: Thomas J. Perry, Muhammad I. Khera
  • Patent number: 4597618
    Abstract: A connector having a base including a lower surface and a plurality of apertures. The apertures each engage a corresponding one of a quantity of terminating pins. A lock member is provided within a channel formed in the base to engage and lock engaged pins between the lock member and an aperture side wall. The combination of locking centrally located pins via the lock member and preventing over engagement of outwardly positioned pins by action of the pins on end walls of corresponding apertures acting to stabilize the connector relative to the pins.
    Type: Grant
    Filed: December 19, 1983
    Date of Patent: July 1, 1986
    Assignee: GTE Automatic Electric Inc.
    Inventor: William A. Reimer
  • Patent number: 4598268
    Abstract: In a telecommunications switching system, a thick film digital span conversion circuit is connected between a digital span and a switching network of the switching system. The circuit converts data, which is encoded for digital span use, to TTL logic coding for use by the switching network. The telecommunications switching system also provides for duplicated data transmission through the switching network. Duplicated conversion circuits are employed in an active/standby configuration under CPU control. The present circuit is relatively small in size and has minimal power consumption.
    Type: Grant
    Filed: June 22, 1983
    Date of Patent: July 1, 1986
    Assignee: GTE Automatic Electric Inc.
    Inventor: Thomas J. Perry
  • Patent number: 4596015
    Abstract: The present invention is an approach for verifying the operation of read only memory digital pads associated with the switching network digital switching system. Any failures are detected and an indication is transmitted for fault detection and recovery.
    Type: Grant
    Filed: July 1, 1985
    Date of Patent: June 17, 1986
    Assignee: GTE Automatic Electric Inc.
    Inventors: John L. Clements, Stig E. Magnusson
  • Patent number: 4594713
    Abstract: A receive data reformatter for a telecommunications switching system is shown for disassembling a data message to a plurality of 8-bit data bytes. The receive data reformatter is comprised of a parallel to serial converter which receives the data message one byte at a time which it subsequently outputs serially. A horizontal parity check circuit receives the serial data and is arranged to output an error signal when an error in parity is detected. A serial to parallel converter, connected to the serial output of the parallel to serial converter, receives the serial data and assembles the serial data into parallel form. A write buffer connected to the serial to parallel converter receives the assembled parallel data when eight data bits have been accumulated in the serial to parallel converter. The thus formed data byte is output to a peripheral processor of the telecommunications switching system.
    Type: Grant
    Filed: December 22, 1983
    Date of Patent: June 10, 1986
    Assignee: GTE Automatic Electric Inc.
    Inventors: Thomas J. Perry, Muhammad I. Khera
  • Patent number: 4594712
    Abstract: A transmit data formatter is provided for assembling a plurality of 8-bit data bytes into a data message containing a plurality of message bytes. The transmit data formatter includes a receive buffer which receives a data byte from a peripheral processor. A parallel to serial converter receives the data byte from the receive buffer and outputs the data byte serially. A serial to parallel converter receives the serial data byte and assembles the data byte into a partial message byte when seven data bits have been received. A horizontal parity generator connected to the parallel to serial converter develops a horizontal parity bit which is appended to the seven data bits forming a message byte.
    Type: Grant
    Filed: December 22, 1983
    Date of Patent: June 10, 1986
    Assignee: GTE Automatic Electric Inc.
    Inventors: Thomas J. Perry, Muhammad I. Khera
  • Patent number: 4584786
    Abstract: An information panel assembly comprised of liquid crystal display devices, positioned on a mounting member and sandwiched between a cover member and a circuit member. Elastomeric connectors connect the liquid crystal display devices to drive circuitry on the circuit member. The cover member includes rear projecting members which are accepted by apertures on the circuit member and are disposed to engage threaded fasteners, locking the assembly together. A switch member including a matrix of membrane switches is mounted over the cover member connecting each switch to the circuit member thereby, selectively controlling the information displayed.
    Type: Grant
    Filed: December 23, 1982
    Date of Patent: April 29, 1986
    Assignee: GTE Automatic Electric Inc.
    Inventor: Thomas Georgopulos
  • Patent number: 4569043
    Abstract: An arrangement for interfacing the originating time stage (OTS) and terminating time stage (TTS) of a time and control unit (TCU) to the space stage of T-S-T digital switching system. The space stage includes an intra-path through the space stage as well as an interpath. The interface transmits PCM samples simultaneously from the OTS to both the intra and interpaths of the space stage. PCM samples from the space stage are received by an intra buffer and an inter buffer from the intra path and inter path respectively. A TCU control memory gates and connects either the intra buffer or inter buffer to the TTS.
    Type: Grant
    Filed: September 3, 1985
    Date of Patent: February 4, 1986
    Assignee: GTE Automatic Electric Inc.
    Inventors: Nathaniel Simmons, Sergio E. Puccini, Stig E. Magnusson, Kamal I. Parikh
  • Patent number: 4550362
    Abstract: An arrangement for positioning a printed wiring board relative to a rigid backplane without the need of support for the printed wiring board from below. Connector pins extend from the backplane and engage connector sockets mounted on the printed wiring board to support the printed wiring board. The printed wiring board is further prevented from falling away from the backplane by a retaining guide assembly which is mounted to the backplane and which engages the front edge of the printed wiring board at its upper end.
    Type: Grant
    Filed: November 22, 1982
    Date of Patent: October 29, 1985
    Assignee: GTE Automatic Electric Inc.
    Inventor: William A. Reimer
  • Patent number: 4532624
    Abstract: Circuitry for validating the integrity of PCM data transmitted through a digital switching network is shown. The space stage of the switching system requires that appropriate data validity be maintained throughout. A parity scheme is employed to fulfill this requirement. For detection of invalid parity, an alarm notification is sent to the central processing unit (CPU) of the switching system. The CPU may then interrogate the space switching circuitry to determine the particular location of the parity failure. In addition, the circuitry provides for a testing feature, such that, the operation of the parity checking circuits may be validated.
    Type: Grant
    Filed: November 3, 1983
    Date of Patent: July 30, 1985
    Assignee: GTE Automatic Electric Inc.
    Inventor: Robert E. Renner
  • Patent number: 4528616
    Abstract: An enclosure for a printed wiring board. The enclosure includes a U-shaped channel member having a ledge in each of its sides. Each ledge has a floor and a wall, and each wall includes at least one projection. A printed wiring board is retained against the ledge floors by means of the projections acting against the printed wiring board. Longitudinal motion of the printed wiring board, in its retained position, is prevented by a tubular projection attached to the U-shaped member extending through an aperture in the printed wiring board. A cover is provided and retained in engagement with the U-shaped member by a plurality of cover projections engaging depressions in a cover receiving ledge formed in the U-shaped member. The enclosure is adapted to be positioned relative to a relay structure by a longitudinal rib attached to the base of the U-shaped member. A fastener extends through the cover and the tubular projection, and engages the relay structure to affix the enclosure to the relay structure.
    Type: Grant
    Filed: March 28, 1983
    Date of Patent: July 9, 1985
    Assignee: GTE Automatic Electric Inc.
    Inventor: James V. Koppensteiner
  • Patent number: 4527157
    Abstract: The present invention is a power zoning arrangement for a common channel interoffice signaling system. For small switching offices a minimal hardware configuration is provided for CCIS data transfer while maintaining a single fault tolerant system.
    Type: Grant
    Filed: September 30, 1982
    Date of Patent: July 2, 1985
    Assignee: GTE Automatic Electric Inc.
    Inventor: Krikor A. Krikor
  • Patent number: 4525831
    Abstract: An interface arrangement is shown compensating for timing delays during transmission of communication information between a transmitting and receiving stage of a T-S-T digital switching system. The arrangement includes a buffer at the receiving stage having first and second storage files. During a first time slot communication information is written in the first file using control signals transmitted along with the communication information while simultaneously the second file is read using a local control signal. In the subsequent time slot the second file is written to and the first file is read, providing a one time slot slip between the transmitting and receiving stages.
    Type: Grant
    Filed: June 22, 1983
    Date of Patent: June 25, 1985
    Assignee: GTE Automatic Electric Inc.
    Inventors: Nathaniel Simmons, Kamal I. Parikh
  • Patent number: 4524442
    Abstract: A space stage for a T-S-T digital switching system is shown arranged into four identical space stage units (SSU). Each SSU is arranged into modular functional elements. The elements are combined in each SSU to allow the space stage to grow modularly, interconnecting from thirty-two to sixty-four originating time and terminating time stages.
    Type: Grant
    Filed: June 22, 1983
    Date of Patent: June 18, 1985
    Assignee: GTE Automatic Electric Inc.
    Inventors: Nathaniel Simmons, Sergio E. Puccini, Stig E. Magnusson, Kanal I. Parikh
  • Patent number: 4524441
    Abstract: A space stage for a T-S-T digital switching system is shown arranged into modular functional elements. The elements are combined allowing the space stage to grow modularly to interconnect from one to thirty-two originating time stages and terminating time stages.
    Type: Grant
    Filed: June 22, 1983
    Date of Patent: June 18, 1985
    Assignee: GTE Automatic Electric Inc.
    Inventors: Nathaniel Simmons, Sergio E. Puccini, Stig E. Magnusson, Kamal I. Parikh
  • Patent number: 4520478
    Abstract: A space stage for a T-S-T digital switching system is shown arranged to interconnect the originating time stages (OTS) and terminating time stages (TTS) of a first time group and the OTS's and TTS's of a second time group. The space stage includes four identical space stage units (SSU). The first SSU interconnects the OTS's and TTS's of the first time group and the second SSU the OTS's and TTS's of the second time group. The third SSU interconnects the OTS's of the first time group to the TTS's of the second time group and the fourth SSU interconnects the OTS's of the second time group to the TTS's of the first time group.
    Type: Grant
    Filed: June 22, 1983
    Date of Patent: May 28, 1985
    Assignee: GTE Automatic Electric Inc.
    Inventors: Nathaniel Simmons, Sergio E. Puccini, Stig E. Magnusson, Kamal I. Parikh
  • Patent number: 4518211
    Abstract: A device is disclosed for mounting, interconnecting and terminating printed circuits. The invention comprises a frame of insulating material including a fixed printed circuit substrate and an area for supporting and confining a removable printed circuit substrate. A connector molded on one end of the frame extends input/output signals to both substrates. A handle molded on a second end of the frame includes slots through which clips are inserted electrically interconnecting the two substrates. The clips also aid in retaining the removable circuit substrate to the frame.
    Type: Grant
    Filed: September 26, 1983
    Date of Patent: May 21, 1985
    Assignee: GTE Automatic Electric Inc.
    Inventors: William E. Stepan, Wayne E. Neese, Thomas D. Belanger, Jr., Robert F. Janninck
  • Patent number: 4516237
    Abstract: A remote data link controller is disclosed for formatting, transmitting and receiving control data over high speed digital data links between the peripheral processors of a plurality of telecommunications switching systems. The remote data link controller includes a microprocessor controlled data link processing circuit which is time shared among all of the digital data links. The remote data link controller processes one transmit and one receive message byte during a reformatting cycle for each digital data link. It stores any intermediate results in a temporary memory than proceeds to service the next digital data link. The remote data link controller fetches intermediate results from the temporary memory, processes the data and stores the next intermediate results in the temporary memory until it has completely serviced all of the digital data links.
    Type: Grant
    Filed: December 22, 1983
    Date of Patent: May 7, 1985
    Assignee: GTE Automatic Electric Inc.
    Inventors: Thomas J. Perry, Muhammad I. Khera
  • Patent number: D283617
    Type: Grant
    Filed: September 16, 1983
    Date of Patent: April 29, 1986
    Assignee: GTE Automatic Electric Inc.
    Inventors: George M. Janda, John E. Kaczkos
  • Patent number: D283618
    Type: Grant
    Filed: September 16, 1983
    Date of Patent: April 29, 1986
    Assignee: GTE Automatic Electric Inc.
    Inventors: George M. Janda, John E. Kaczkos