Abstract: An integratable PCM decoder that is relatively insensitive to parasitic and stray capacitance effects and that requires a total capacitance of only 32 times the normalized capacitance Co of the smallest capacitor thereof. The decoder comprises a source of positive and negative reference voltages; a differential input operational amplifier having its non-inverting input connected to ground; a storage capacitor CO=16Co connected as a feedback capacitor between the inverting input and the output terminals of the amplifier so that they operate as a voltage source; binary weighted capacitors C1=Co, C2=2Co, C3=4Co and C4=8Co; and a second unit weighted capacitor C5=Co. In an a-law decoder, switch means alternately connects one and other sides of ones of C1-C5 (1) between ground and either a.+-.

Abstract: An integratable PCM decoder requiring a total capacitance of only 32 times the normalized capacitance Co of the smallest capacitor thereof. The decoder comprises a source of positive and negative reference voltages, a differential input operational amplifier having its non-inverting input connected to ground, a storage capacitor CO=16Co connected as a feedback capacitor between the inverting input and the output terminals of the amplifier so that they operate as a voltage source, binary weighted capacitors C1=Co, C2=Co, C3=4Co and C4=8Co, and a second unit weighted capacitor C5=Co. In a mu-law decoder, switch means alternately connect one and other sides of ones of C1-C5 (1) between ground and either a.+-.reference voltage or ground, in accordance with the characterizations in a PCM coded digital input word, and (2) across the storage capacitor CO for redistributing charge on the capacitors for each segment of a designated polarity.

Abstract: An incoming bit stream is digitally processed to obtain both in-phase and quadrature-phase 7-level correlative signals. The two 7-level correlative signals are separately band limited to a passband having a bandwidth that is about 1/8th of the bit rate of the original bit stream, and these band limited signals are then separately analog modulated, respectively, using in-phase and quadrature-phase components derived from a line carrier oscillator. The modulation products are then combined in a summing circuit to derive a signal-sideband 7-level correlative signal.