Abstract: An amplifier circuit includes a input point, an output point, and an amplifying path from the input point to the output point. The amplifying path includes a first switch and an amplifier in series with the first switch. The first switch includes a first transistor having a first gate, a first source, and a first drain, the first gate coupled to a control point. The first source or drain is coupled to the signal input point and the other is coupled to the amplifier. The amplifier includes a second transistor having a second gate, a second source, and a second drain. The second gate is coupled to the second switch in the signal amplifying path. The second source or drain is coupled to the signal output point. A third transistor may be coupled to the signal output point through the second transistor in a cascade amplifying configuration.

Abstract: An amplifying circuit for receiving a signal in a wireless network includes an amplifier and two switches. The amplifier includes an isolation switch having a gate connected to a control signal for activating the isolation switch transistor in a bypass mode and a source/drain connected to the input for receiving the signal and the other source/drain connected to the gate of an amplifier transistor. The amplifier also includes a bypass transistor having a gate connected to a control signal for activating the bypass transistor in a bypass mode. The bypass switch is connected in parallel with the series combination of the isolation switch and amplifier between the input and output, enabling the received signal to bypass the amplifier. In the bypass mode, the isolation switch prevents RF energy from voltage modulating the gate of the amplifier transistor gate thus reducing undesirable distortion and harmonics from the amplifier.