Patents Assigned to Guobiao Zhang
  • Three-dimensional memory comprising an integrated intermediate-circuit die
    Patent number: 9024425
    Abstract: The present invention discloses a discrete three-dimensional memory (3D-M). It comprises at least a 3D-array die and at least an integrated intermediate-circuit die comprising both a read/write-voltage generator (VR/VW-generator) and an address/data translator (A/D-translator). The intermediate-circuit die performs voltage, address and/or data conversion between the 3D-M core region and the host. Discrete 3D-M support multiple 3D-array dies.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: May 5, 2015
    Assignees: HangZhou HaiCun Information Technology Co., Ltd., Guobiao Zhang
    Inventor: Guobiao Zhang
  • Discrete Three-Dimensional Memory Comprising Dice with Different BEOL Structures
    Publication number: 20140036566
    Abstract: The present invention discloses a discrete three-dimensional memory (3D-M). It comprises at least a 3D-array die and at least a peripheral-circuit die. At least a peripheral-circuit component of the 3D-M is located on the peripheral-circuit die instead of the 3D-array die. The 3D-array die and the peripheral-circuit die have substantially different back-end-of-line (BEOL) structures, e.g. different number of BEOL layers, different number of interconnect layers, and/or different interconnect materials.
    Type: Application
    Filed: October 6, 2013
    Publication date: February 6, 2014
    Applicants: Guobiao Zhang, ChengDu HaiCun IP Technology LLC
    Inventor: Guobiao ZHANG