Patents Assigned to Hadco Santa Clara, Inc.
  • Patent number: 7329831
    Abstract: Improved systems and methods for laser trimming resistors printed on a substrate layer are provided. An exemplary embodiment measures a resistance value for each annular resistor and sorts the annular resistors into one or more bins based on the measured resistance values and target resistance values associated with each resistor. A laser trim file may then be assigned to each bin based on a predictive trim formulation, where each laser trim file defines a set of configuration parameters for a laser drill to conform each resistor with their respective target value. The laser drill uses the laser trim files to trim the resistors within each bin in accordance with the laser trim file assigned to that bin.
    Type: Grant
    Filed: March 29, 2005
    Date of Patent: February 12, 2008
    Assignee: HADCO Santa Clara, Inc.
    Inventors: Nicholas Biunno, Atul Patel, Ken Ogle, George Dudnikov
  • Patent number: 7297896
    Abstract: Improved systems and methods for laser trimming resistors are provided. An exemplary embodiment measures a resistance value for each resistor and sorts the resistors into one or more bins based on the measured resistance values and target resistance values associated with each resistor. A laser trim file may then be assigned to each bin based on a predictive trim formulation, where each laser trim file defines a set of configuration parameters for a laser drill to conform each resistor with their respective target value. The laser drill uses the laser trim files to trim the resistors within each bin in accordance with the laser trim file assigned to that bin.
    Type: Grant
    Filed: October 19, 2005
    Date of Patent: November 20, 2007
    Assignee: HADCO Santa Clara, Inc.
    Inventors: Nicholas Biunno, Atul Patel, Ken Ogle, George Dudnikov
  • Patent number: 6972391
    Abstract: Improved systems and methods for laser trimming annular resistors printed on a circuit board are provided. An exemplary embodiment measures a resistance value for each annular resistor and sorts the annular resistors into one or more bins based on the measured resistance values and target resistance values associated with each annular resistor. A laser trim file may then be assigned to each bin based on a predictive trim formulation, where each laser trim file defines a set of configuration parameters for a laser drill to conform each annular resistor with their respective target value. The laser drill uses laser trim files to trim the annular resistors within each bin in accordance with a laser trim file assigned to that bin.
    Type: Grant
    Filed: November 21, 2002
    Date of Patent: December 6, 2005
    Assignee: HADCO Santa Clara, Inc.
    Inventors: Nicholas Biunno, Atul Patel, Ken Ogle, George Dudnikov
  • Patent number: 6282782
    Abstract: A method of forming a subassembly for use in a printed circuit board is described. This method includes providing a subassembly including a circuit board layer laminated to two sheets of conductive material with two intermediate sheets of prepreg material, forming a via in the assembly, plating the via, filling the via with a plug material in a volatile solvent, evaporating the volatile solvent, and curing the plug material. Also described is a method of forming a partially filled via in a circuit board layer and a method of forming a thermally conductive plug in a circuit board layer for the transfer of thermal energy from one surface of the circuit board to the other.
    Type: Grant
    Filed: September 2, 1999
    Date of Patent: September 4, 2001
    Assignee: Hadco Santa Clara, Inc.
    Inventors: Nicholas Biunno, Scott Bryan, Mason Hu
  • Patent number: 6276055
    Abstract: A method of forming one or more plugs in a circuit board layer is described which includes providing the circuit board layer, the circuit board layer having a first surface, a second surface, and defining a via containing a plug material in a volatile solvent, evaporating the volatile solvent, and curing the plug material. A product made according to the above method is also described.
    Type: Grant
    Filed: September 24, 1998
    Date of Patent: August 21, 2001
    Assignee: Hadco Santa Clara, Inc.
    Inventors: Scott K. Bryan, Nicholas Biunno
  • Patent number: 5870274
    Abstract: An in situ method for forming a bypass capacitor element internally within a PCB including the steps of arranging one or more uncured dielectric sheets with conductive foils on opposite sides thereof and laminating the conductive foils to the dielectric sheet simultaneously as the PCB is formed by a final lamination step, the conductive foils preferably being laminated to another layer of the PCB prior to their arrangement adjacent the dielectric sheet or sheets, the dielectric foils even more preferably being initially laminated to additional dielectric sheets in order to form multiple bypass capacitive elements as a compound subassembly within the PCB. A number of different dielectric materials and resins are disclosed for forming the capacitor element.
    Type: Grant
    Filed: June 23, 1997
    Date of Patent: February 9, 1999
    Assignee: Hadco Santa Clara, Inc.
    Inventor: Gregory L. Lucas