Patents Assigned to Hanwa Electronic Ind. Co., Ltd.
  • Patent number: 8829972
    Abstract: An integral value measuring circuit includes an operational amplifier and a capacitor connected between input and output sides thereof, an electric potential of an output terminal where a predetermined resistance element connected to an output side of the operational amplifier is being zero, positive and negative DC voltage generating circuits which comprise positive and negative power sources, respectively, at the output side of the operational amplifier, the positive and negative DC voltage generating circuits and being connected to positive and negative power terminals, respectively, of the operational amplifier through switches, and a connection line between the negative power terminal and one switch and a connection line between the positive power terminal and another switch being connected to the positive and negative power terminals, respectively, of the operational amplifier through cross resistance elements having resistance values negligible compared to a leakage resistance value of the switches.
    Type: Grant
    Filed: July 6, 2012
    Date of Patent: September 9, 2014
    Assignee: Hanwa Electronic Ind. Co., Ltd.
    Inventors: Toshiyuki Nakaie, Joji Kayano
  • Patent number: 8410791
    Abstract: The application methods in the related art cannot apply a sufficient voltage with a rectangular wave having a short rise time to an electronic circuit. Furthermore, electrostatic discharge test can apply a sufficient voltage but can only apply an oscillating waveform. A TLP generator is used as a rectangular wave generator. The sum of an injection resistance and a matching resistance is set so as to match the characteristic impedance of a transmission line for transmitting a rectangular wave to a test target. A capacitor is connected to a return line of the applied rectangular wave. With this configuration, stable application can be achieved. An error observation function of an electronic circuit gradually increases a peak value of the rectangular wave and determines the immunity based on an application voltage to cause an error for the first time.
    Type: Grant
    Filed: March 6, 2008
    Date of Patent: April 2, 2013
    Assignees: NEC Corporation, Renesas Electronics Corporation, Hanwa Electronic Ind. Co., Ltd.
    Inventors: Tsuneo Tsukagoshi, Takeshi Watanabe, Toshiyuki Nakaie, Nobuchika Matsui
  • Publication number: 20130009628
    Abstract: An integral value measuring circuit includes an operational amplifier and a capacitor connected between input and output sides thereof, an electric potential of an output terminal where a predetermined resistance element connected to an output side of the operational amplifier is being zero, positive and negative DC voltage generating circuits which comprise positive and negative power sources, respectively, at the output side of the operational amplifier, the positive and negative DC voltage generating circuits and being connected to positive and negative power terminals, respectively, of the operational amplifier through switches, and a connection line between the negative power terminal and one switch and a connection line between the positive power terminal and another switch being connected to the positive and negative power terminals, respectively, of the operational amplifier through cross resistance elements having resistance values negligible compared to a leakage resistance value of the switches.
    Type: Application
    Filed: July 6, 2012
    Publication date: January 10, 2013
    Applicant: HANWA ELECTRONIC IND. CO., LTD.
    Inventors: Toshiyuki Nakaie, Joji Kayano
  • Patent number: 8339146
    Abstract: Calibration method for calibrating transient behavior of a TLP test system. The system comprises a TLP generator, probe needles, nominally impedance matched transmission lines and measurement equipment, connected between the transmission lines and the TLP generator, for detecting transient behavior of a device under test by simultaneously capturing voltage and current waveforms as a result of generated pulses. The calibration method comprises (a) applying the TLP test system on an open and capturing first voltage and current waveforms; (b) applying the TLP test system on a calibration element having a known finite impedance and a known transient response and capturing second voltage and current waveforms; (c) transforming the captured first and second current and voltage waveforms to the frequency domain, and (d) determining calibration data for the transient behavior of the TLP test system on the basis of the transformed first and second voltage and current waveforms.
    Type: Grant
    Filed: December 21, 2009
    Date of Patent: December 25, 2012
    Assignees: IMEC, Hanwa Electronic Ind. Co., Ltd.
    Inventors: Philippe Roussel, Dimitri Linten
  • Publication number: 20100156447
    Abstract: Calibration method for calibrating transient behaviour of a TLP test system. The system comprises a TLP generator, probe needles, nominally impedance matched transmission lines and measurement equipment, connected between the transmission lines and the TLP generator, for detecting transient behaviour of a device under test by simultaneously capturing voltage and current waveforms as a result of generated pulses. The calibration method comprises (a) applying the TLP test system on an open and capturing first voltage and current waveforms; (b) applying the TLP test system on a calibration element having a known finite impedance and a known transient response and capturing second voltage and current waveforms; (c) transforming the captured first and second current and voltage waveforms to the frequency domain, and (d) determining calibration data for the transient behaviour of the TLP test system on the basis of the transformed first and second voltage and current waveforms.
    Type: Application
    Filed: December 21, 2009
    Publication date: June 24, 2010
    Applicants: IMEC, HANWA ELECTRONIC IND. CO., LTD
    Inventors: Philippe Roussel, Dimitri Linten
  • Publication number: 20100090710
    Abstract: The application methods in the related art cannot apply a sufficient voltage with a rectangular wave having a short rise time to an electronic circuit. Furthermore, electrostatic discharge test can apply a sufficient voltage but can only apply an oscillating waveform. A TLP generator is used as a rectangular wave generator. The sum of an injection resistance and a matching resistance is set so as to match the characteristic impedance of a transmission line for transmitting a rectangular wave to a test target. A capacitor is connected to a return line of the applied rectangular wave. With this configuration, stable application can be achieved. An error observation function of an electronic circuit gradually increases a peak value of the rectangular wave and determines the immunity based on an application voltage to cause an error for the first time.
    Type: Application
    Filed: March 6, 2008
    Publication date: April 15, 2010
    Applicants: NEC Corporation, NEC Electronics Corporation, Hanwa Electronic Ind. Co., Ltd.
    Inventors: Tsuneo Tsukagoshi, Takeshi Watanabe, Toshiyuki Nakaie, Nobuchika Matsui
  • Patent number: 7609076
    Abstract: A method of quickly measuring a characteristic impedance of an ESD protecting circuit by applying a discharge voltage to the ESD protecting circuit, includes the steps of measuring a variation in discharge voltage applied to and a variation in discharge current caused to flow through the ESD protecting circuit with time; simultaneously detecting a state when both the discharge voltage and discharge current corresponding to each other are attenuated, after both the discharge voltage and discharge current sequentially rise to arrive individually to respective peak values based on an input to or an output from a computer; and taking a ratio of the variation of discharge voltage to the variation of discharge current during the attenuation as an impedance value when the ratio is nearly constant as well as an apparatus for realizing the same.
    Type: Grant
    Filed: May 17, 2007
    Date of Patent: October 27, 2009
    Assignee: Hanwa Electronic Ind. Co., Ltd.
    Inventors: Toshiyuki Nakaie, Masanori Sawada, Taizo Shintani, Natarajan Mahadeva Iyer, David Eric Tremouilles
  • Publication number: 20090027063
    Abstract: The present disclosure relates to a method for calibrating transient behaviour of an electrostatic discharge (ESD) test system. The system includes an ESD pulse generator and probe needles for applying a predetermined pulse on a device under test. The probe needles are connected to the ESD pulse generator via conductors. The test system includes measurement equipment for detecting transient behaviour of the device under test by simultaneously capturing voltage and current waveforms the device as a result of the pulse. The method comprises the steps of: (a) applying the ESD test system on a first known system with a first known impedance, (b) applying the ESD test system on a second known system with a known second impedance, and (c) determining calibration data for the transient behaviour the ESD test system on the basis of captured voltage and current waveforms, taking into account said known first and second impedances.
    Type: Application
    Filed: March 19, 2008
    Publication date: January 29, 2009
    Applicants: INTERUNIVERSITAIR MICROELEKTRONICA CENTRUM (IMEC), HANWA ELECTRONICS IND. CO., LTD.
    Inventors: Mirko Scholz, David Eric Tremouilles, Steven Thijs, Dimitri Linten
  • Publication number: 20080004820
    Abstract: A method of quickly measuring a characteristic impedance of an ESD protecting circuit by applying a discharge voltage to the ESD protecting circuit, includes the steps of measuring a variation in discharge voltage applied to and a variation in discharge current caused to flow through the ESD protecting circuit with time, grasping a state until both the discharge voltage and discharge current corresponding to each other whenever a predetermined common time elapses comes to an attenuation process after both the discharge voltage and discharge current sequentially rise to come individually to respective peak values based on an input to or an output from a computer; and taking a ratio of the variation of discharge voltage to the variation of discharge current in the attenuation process as an impedance value when the ratio is nearly constant as well as an apparatus for realizing the same.
    Type: Application
    Filed: May 17, 2007
    Publication date: January 3, 2008
    Applicant: HANWA ELECTRONIC IND. CO., LTD.
    Inventors: Toshiyuki NAKAIE, Masanori SAWADA, Taizo SHINTANI, Natarajan Mahadeva IYER, David Eric TREMOUILLES
  • Patent number: 5740007
    Abstract: A CDM simulator for use with an integrated circuit having a terminal and for use with a grounding conductor, includes a cylindrical conductor, and a mercury lead switch contained in the cylindrical conductor, the mercury lead switch having a first end connected to the cylindrical conductor and a second end for connection to the terminal of the integrated circuit, and the mercury lead switch having a first length, the cylindrical conductor having an end closer to the terminal of the integrated circuit for connection to the grounding conductor in order to release electric charge from the integrated circuit to the grounding conductor, and the cylindrical conductor having a second length longer than the first length of the mercury lead switch.
    Type: Grant
    Filed: June 10, 1996
    Date of Patent: April 14, 1998
    Assignee: Hanwa Electronic Ind. Co., Ltd.
    Inventors: Toshiyuki Nakaie, Akira Yoshino, Shin Yoshida, Kenichi Sengo