Abstract: A video signal processing system for processing a video data VIN and graphic data D&mgr;P includes a filter unit, which receives the video data VIN. The filter unit filters the video data VIN to convert the video data VIN into video pictures formated with a different number of columns and/or lines, and provides a filtered video signal indicative thereof. The filter unit buffers individual pixels and/or lines in a first memory device. A second memory device receives and stores the graphic data D&mgr;P and the filtered video signal and provides stored signals indicative thereof. A third memory device is connected to the second memory, and stores data received from the second memory device. A mixing unit receives and mixes the stored graphic data and the stored filtered video data to provide a video output signal VOUT.

Abstract: A navigation unit, especially for vehicles, with a data bus, a data memory on which a plurality of map information items and navigation data are stored, with a navigation computer, connected to the data bus, for route planning, with a data processing unit, connected to the data bus, for processing the data into picture information, the data processing unit containing a picture memory for storing the picture information, with a monitor, connected to the data processing unit, on which the picture information can be displayed, with a communication block with a control unit for entering the start location, intermediate destination, and/or final destination of a trip, such that the data processing unit contains a map memory for storing road map information.

Abstract: To demodulate the RDS signal, the stereo-multiplex signal is multiplied in a first branch by the in-phase component of an oscillator filtered by a low-pass filter while decimated in its sampling rate and filtered by a high-pass filter while in a second branch it is multiplied by the quadrature component of the oscillator filtered by a low-pass filter decimated in its sampling rate, and filtered by a high-pass filter. An error signal to control the oscillator is calculated from the high-pass-filtered signals and the RDS bit clock. A clock generator generating the RDS bit clock is controlled by the first high-pass-filtered signal and by the oscillator. An RDS decoder, to whose input the first high-pass-filtered signal is applied. and an arithmetic unit which calculates the error signal from the high-pass-filtered signals and from the PDS bit clock are both clocked by the clock generator. The RDS data are retrievable from the output of the RDS decoder.

Abstract: An audio decoding device for decompressing an audio signal that was compressed in accordance with a given compression method having a program-controlled signal processor which receives the compressed audio signal and from it produces a decompressed audio signal under the control of a decompression program; a loadable program memory that is connected to the signal processor for storing the decompression program; and a management device which is connected to the program memory and is controlled by the compressed audio signal, and which manages decompression programs corresponding to at least two different compression methods in order to determine the respectively used compression method from the compressed audio signal, to select the pertinent decompression program and to load the pertinent decompression program into the program memory.