Abstract: A scalable packet analyzer receives data packets from a data packet source for packet analysis and includes a plurality of policy engine arrays, each having a plurality of packet analysis microengines. A policy algorithm loader module is operative with each packet analysis microengine for loading a policy algorithm to each packet analysis microengine such that each packet analysis microengine analyzes specific sections of the data packet in parallel within each policy engine array based on the applied policy algorithm to obtain data about the data packet for further data packet processing.

Abstract: A video multiviewer system may include a plurality of video scalers operating in parallel for generating initially scaled video streams by performing video scaling in at least one dimension on a plurality of video input streams. The video multiviewer system may also include a processing unit coupled downstream from the video scalers for generating additionally scaled video streams by performing additional video scaling on the initially scaled video streams, and a display cooperating with the processing unit for displaying multiple video windows based upon the additionally scaled video streams.

Abstract: A video multiviewer system may include a plurality of video scalers operating in parallel for generating initially scaled video streams by performing video scaling in at least one dimension on a plurality of video input streams. The video multiviewer system may also include at least one video cross-point switcher coupled downstream from the video scalers, and a processing unit coupled downstream from the video cross-point switcher for generating additionally scaled video streams by performing additional video scaling on the initially scaled video stream. The video scalers and the processing unit may communicate through the video cross-point switcher using a serial digital interface.

Abstract: A video multiviewer system includes a Graphics Processing Unit (GPU) that includes a GPU memory. A video input module is operative with the GPU for receiving video data and transferring the video data to the GPU memory via a Direct Memory Access (DMA). A programmable circuit such as a Field Programmable Gate Array (FPGA) includes a multi-ported and in one aspect a dual ported block Random Access Memory (RAM) configured for a plurality of DMA channels for receiving video data and allowing uninterrupted operation of consecutive DMA transfers of video data to the GPU memory. A display displays the multiple video windows based upon video data received within the GPU memory.

Abstract: A communications device includes a signal input that receives an orthogonal frequency division multiplexed (OFDM) communications signal. A demodulator is connected to the signal input for receiving the OFDM communications signal and demodulating the OFDM communication signal. It includes at least one memory element for storing the at least one sine/cosine basis waveform approximation as complex exponential functions. A logic circuit performs logical shifts in additions and multiples of ±2n and extracts amplitude and phase values from a plurality of N data subcarriers within the OFDN communications signal. The demodulator includes efficient implementation of the FFT for use as an OFDM demodulator where the complex exponentials are approximated by multi-level complex sinusoids and optionally oversampled to increase SNR of the FFT output.

Abstract: A communications device includes at least one memory device for storing complex exponential functions as approximations of sine and cosine basis waveforms. A logic circuit adds and subtracts the complex exponential functions to generate an Orthogonal Frequency Division Multiplexed (OFDM) communications signal as a plurality of N data subcarriers that carry communications data. The logic circuit provides efficient and accurate implementation of the IFFT for use as an OFDM modulator using additions of stored complex exponentials and modulation of the integer-valued QAM data symbols using logic shifts and sign changes (2's complement).

Abstract: An imaging system includes a 3D database for storing data relating to three-dimensional site model images having a vantage point position and orientation when displayed. A 2D database stores data relating to a two-dimensional image that corresponds to the vantage point position and orientation for the three-dimensional site model image. Both the three-dimensional site model image and two-dimensional imagery are displayed typically on a common display A processor operative with the two-dimensional and three-dimensional databases and will create and display the three-dimensional site model image and two-dimensional imagery from data retrieved from the 2D and 3D databases and correlates and synchronizes the three-dimensional site model image and two-dimensional imagery to establish and maintain a spatial orientation between the images as a user interacts with the system.

Abstract: A system delivers data and includes a plurality of data storage devices. A plurality of servers such as video servers are connected to the plurality of data storage devices and access the data storage devices to provide streaming data to a plurality of clients upon request therefrom. Upon failure of one of the servers, the load on the remaining servers is distributed equally among remaining servers using a distribution algorithm that assigns dual client network connections to server groupings such that the failure of any one server will increase the client load on any remaining server by no more than ceil (C/P) loads, where C is the total number of configured clients that access the plurality of servers in the system and P is the total number of server pairs.

Abstract: A video media data storage system may include first and second pluralities of data storage devices each arranged in a redundant array of independent drives (RAID) configuration for permitting writing and reading of video media data. The system may further include at least one memory controller coupled to the first and second pluralities of data storage devices for performing mirrored writing of video media data to both the first and second pluralities of data storage devices. The at least one memory controller may also be for generating respective first and second file allocation tables (FATs) including video media data time stamps and validity information for both of the first and second pluralities of data storage devices, and selectively reading video media data from the first and second pluralities of data storage devices based upon the first and second FATs.

Abstract: A video processing system may include an input for receiving video data including video signal values for a corresponding plurality of image pixels and having an image pattern therein. The system may further include a processor coupled to the input for determining a series of video signal value differences for each pair of adjacent image pixels along at least one direction, detecting at least one image transition boundary based upon the series of video signal value differences, and detecting the image pattern based upon the at least one image transition boundary.

Abstract: A video processing system may include an input for receiving interlaced video data arranged in successive frames each including odd and even fields. A processor may be coupled to the input for determining an improper inversion of the odd and even fields based upon a pair(s) of successive first and second frames each including successive first and second fields. The processor may generate a first difference value(s) based upon a comparison between the first field in the first frame and the second field in the second frame, and a second difference value(s) based upon a comparison between a second field in the first frame and the first field in the second frame. The processor may determine an improper inversion of the odd and even fields based upon a comparison of the first difference value(s) and the second difference value(s) for the pair(s) of successive first and second frames.

Abstract: A satellite communications system may include a satellite, a first ground based satellite transceiver, at least one second ground based satellite transceiver, and at least one ground based terminal coupled to the at least one second ground based satellite transceiver and classifying uplink data into different uplink data classifications, determining an uplink data rate, and determining a satellite signal path degradation. The satellite communications system may also include a gateway coupled to the first ground based satellite transceiver and communicating with the at least one ground based terminal via the satellite. The gateway may use cross layer protocol interfacing with the at least one ground based terminal for adaptively changing at least one transmission characteristic based upon the satellite signal path degradation. The satellite may allocate bandwidth based upon the uplink data classification and the uplink data rate.

Abstract: A system communicates data and includes an encoder for encoding communications data. A modulator maps the communications data based on a specific mapping algorithm to form a communications signal over which the communications data can be transmitted. The communications signal includes a preamble that has set-up or transmission parameters used for acquiring the signal at a modem and at least one extended preamble for conveying additional set-up or transmission parameters. This extended preamble includes N extended preamble bits having at least one of information, transmission parameter and control bits and M map bits that identify a predetermined mapping for the N extended preamble bits.

Abstract: A system apparatus and method generates a communications signal having an error detection mechanism. A circuit generates a data packet. An encoder multiplies and accumulates data words with values in a distance table containing non-repeated n-bit multipliers having “m” number of one bits that are set to obtain accumulated sum bits and appends the accumulated sum bits to the data packet as an error detection code to form a communications signal to be transmitted.

Abstract: A communication system includes a plurality of mobile nodes forming a mobile ad-hoc network (MANET) and having a network clock time. A plurality of wireless communications links connects the mobile nodes together. Each mobile node includes a communications device and controller for transmitting and routing data packets wirelessly to other mobile nodes via the wireless communications link using a Time Division Multiple Access (TDMA) data transmission. Each mobile node includes a clock circuit having a digital clock time. A clock circuit is operative for processing a second order internal clock compensation factor as a learned and accumulated value for establishing a virtual clock time to correct any clock timing errors of the physical clock time from the network clock time.

Abstract: A communications system includes a plurality of radios that form a carrier sense multiple access (CSMA) wireless communications network and communicate non-packetized digital voice with each other. Each radio is operative for dividing the period following the end of a transmission into a sequence of time slots and determining whether an end of a conversation has occurred. If an end of a conversation has occurred, the system decides randomly or pseudo-randomly with probability p to start transmitting on the channel in that slot.

Abstract: A system of processing map images includes a Web Mapping Service (WMS) for storing map images. A WMS proxy is operative with the WMS and receives from a client a request for a map image for display at the client. A WMS proxy includes a tile broker module that converts the request for the map image into a series of requests for obtaining map tiles. A cache system that stores the map tiles. The tile broker module is operative for returning cached map tiles if they already exist within the cache and retrieving map tiles from the WMS if map tiles are not returned from the cache. A tile building module is operative for building a map image at the WMS proxy from the map tiles in a requested format and resolution and displaying the map image at the client without resampling at the client.

Abstract: A frequency mixer includes a semiconductor substrate. An input current feedback amplifier is formed on the semiconductor substrate and receives a radio frequency (RF) signal and a local oscillator (LO) signal. An inverting current feedback amplifier is formed on the semiconductor substrate and connected to the input current feedback amplifier for inverting the LO signal and producing a half-wave signal. An output current feedback amplifier is formed on the semiconductor substrate and connected to an output of the input and inverting current feedback amplifiers and operative as an inverting summer for the RF and LO signals such that the output polarity of the RF signal is reversed.

Abstract: An image change detecting system may include an image processor cooperating with a geospatial scene model database for generating a reference geospatial image corresponding to the collected geospatial image, and a change detector cooperating with the image processor for detecting a change between the collected geospatial image and the reference geospatial image. The geospatial scene model database may include 3D scene model data, and the collected geospatial image and the reference geospatial image may each include respective 2D image data. The collected geospatial image may have at least one geospatial collection value associated therewith, and the image processor may generate the reference geospatial image based upon synthetically positioning a virtual geospatial image sensor within a geospatial scene model based upon the at least one geospatial collection value.

Abstract: The hybrid junction includes four electrically conductive planar windings, circular or rectangular, arranged so as to lie along an imaginary spherical or cylindrical surface. Each of the four electrically conductive windings is rotated from adjacent windings by about forty-five degrees. The four electrically conductive windings are electrically insulated from each other and each include a respective signal port. The hybrid junction automatically splits and/or sorts signals. Signals applied to any port will split equally between the opposite port pairs. One output signal will be in-phase with the input signal, and the other output signal will be shifted by 0 or 180 degrees from the input signal. The input signal is split equally, output coupling may be half power or loose, and there is isolation between the output ports. The hybrid junction operates over a broad bandwidth.