Abstract: A data processing display terminal utilizing a cathode ray tube (CRT) display is provided in which information-bearing electro-magnetic radiations are suppressed at the neck of the cathode ray tube and in the video circuits leading thereto, instead of mounting the entire display terminal in a shielded enclosure utilizing a piece of shielded glass over the CRT viewing area. A cylindrical shield is provided which completely encloses the socket and neck of the cathode ray tube, and extends to the proximity of the yoke of the CRT. A plurality of connectors are spaced about the cylindrical shield in the vicinity of the socket to accommodate connections to the socket. The video circuitry which carries the information desired to be displayed is completely shielded. The connectors in the cylindrical shield, with the exception of the video signal connector, are all provided with filters, and the video signal is coupled to the cylindrical shield connector by a shielded coaxial cable.

Abstract: There is disclosed herein a dynamic focusing circuit for the minor deflection circuit, hereinafter referred to as to the vertical deflection circuit, for a cathode ray tube to compensate for defocusing characteristics thereof. Such a cathode ray tube employes a major deflection circuit, hereinafter referred to as the horizontal deflection circuit, for deflecting the beam along a horizontal axis at a relatively high raster scan frequency, such as on the order of 28 KHz. Additionally, such a cathode ray tube has associated therewith a minor deflection circuit for deflecting the beam along the vertical axis at a second substantially lower scan frequency and which may be on the order of 50 Hz. A focusing circuit normally receives a steady state DC focusing signal for focusing the beam as it is scanned along the respective horizontal and vertical axes.

Abstract: A printed circuit board connecting and locking assembly, particularly for use in conjunction with zero entry force connectors, is designed to prevent insertion of a printed circuit board into a closed zero entry force connector, to ensure that the printed circuit board is properly seated into the connector before it can be closed, enable a keying of the printed circuit boards so that only the printed circuit board having the proper key can be inserted, and ensure that the printed circuit board, once inserted, is securely locked in place.

Abstract: A video display terminal is disclosed for use in displaying images of data characters on a display screen. Multibit coded data words are supplied by a data source, such as a memory, to a character generator circuit which controls the display of data characters on the face of a video display screen. Character codes are used to address a dot pattern memory which stores dot patterns to provide an image of the required data character to be displayed. The dot patterns may be stored on one size matrix in the dot pattern memory, such as in a 9.times.9 cell, and displayed on a larger dot matrix, such as 9.times.16, on the display screen. Subscripts or descending characters may be stored in the dot pattern memory and vertically repositioned when displayed on the screen. Means are also provided for adjusting the vertical positioning of a line of characters.

Abstract: There is disclosed herein a dynamic focusing circuit for the minor deflection circuit, hereinafter referred to as to the vertical deflection circuit, for a cathode ray tube to compensate for defocusing characteristics thereof. Such a cathode ray tube employs a major deflection circuit, hereinafter referred to as the horizontal deflection circuit, for deflecting the beam along a horizontal axis at a relatively high raster scan frequency, such as on the order of 28 KHz. Additionally such a cathode ray tube has associated therewith a minor deflection circuit for deflecting the beam along the vertical axis at a second substantially lower scan frequency and which may be on the order of 50 Hz. A focusing circuit normally receives a steady state DC focusing signal for focusing the beam as it is scanned along the respective horizontal and vertical axes.

Abstract: A video display terminal is disclosed for displaying dot pattern images of data characters on a display screen with dot pattern modifications being made to the video characteristics thereof. Multibit coded data words are supplied by a data source, such as a memory, to a character generator circuit which controls the display of data characters on the face of a video display screen. These coded data words include at least character codes and video modifier codes. Dot pattern video signals are provided for forming the dot pattern image represented by a coded data character. These dot pattern video signals are modified in accordance with a video dot pattern modifier so that the video image is formed with the modification made thereto. The video modifiers are selectable so that one or more of a plurality of video modifiers may be in effect for a given data character. Additionally, each of these pluralities of modifiers may be programmably chosen from one of a second plurality of available video modifiers.

Abstract: A video display terminal is disclosed for use in displaying images of data characters on a display screen. Multi-bit coded data words are supplied by a data source, such as a memory, to a character generator circuit which controls the display of data characters on the face of a video display screen. The coded data words generally fall into three categories; to wit, character codes, control codes and attribute codes. Character codes describe the type of character to be presented on the screen. Attribute codes present modifications or special conditions to be used in conjunction with a displayed character. Control codes are used in conjunction with the control circuitry employed by the character generator.

Abstract: A metastable arbiter circuit for determining the state of a monitored flip-flop contains an additional flip-flop that is provided on the same semiconductor chip as the operating flip-flop, the metastable condition of which is to be monitored. This additional flip-flop is hardwired in the SET state, so that its high and low outputs can be referenced to indicate when a defined state condition has been achieved in the operating flip-flop. The Q and Q outputs of the second flip-flop from which a pair of reference voltages are derived are applied to a pair of comparators, one comparator being used for negative referencing, the other for positive referencing. Through this circuit combination, there is achieved both level detection and hysteresis to produce a high true output when the complementary outputs of the operating flip-flop have reached a defined stable state.

Abstract: A microprogrammed controller for interconnection between a central processor unit and at least one peripheral unit for controlling the transfer of data therebetween in response to instructions from the central processor unit provides for simplified bit manipulation through a feedback circuit which feeds the data to be supplied to the peripheral unit back to the input bus of the controller for further processing. In this way bit manipulation can be accomplished with a single microinstruction to provide for higher speed and efficiency of operation.