Abstract: An interface for receiving data from an image sensor having an imaging array and a clock generator and for transferring the data to a processor system is described. The interface comprises a memory for storing the imaging array data and the clocking signals at a rate determined by the clocking signals. In response to the quantity of data in the memory, a signal generator generates a signal for transmission to the processor system and a circuit controls the transfer of the data from the memory at a rate determined by the processor system. The memory may be a first-in first-out (FIFO) buffer or an addressable memory. The interface is preferably integrated on the same die as the image sensor. The signal generator may generate either an interrupt signal for transmission to the processor system or a bus request signal for transmission to a bus arbitration unit for the processor system.

Abstract: The method and apparatus for resetting an Active Pixel Sensor (APS) array comprises a controller for sequentially pre-resetting groups of one or more sensors in the array and then simultaneously resetting all of the sensors. The groups may be formed from one or more adjacent or non-adjacent individual sensors, rows or columns of sensors. The apparatus may further include a detector for sensing the bias voltage present on the array substrate in order for the controller to determine the number of sensors in the groups being reset. This method and apparatus assure that current flow is kept at a fairly steady level to avoid large variations in current flow that may disrupt other functioning circuits on the substrate including latch-up.

Abstract: Many electrical sensing devices include an array of transducer elements for converting external stimuli to electrical indications. Novel technologies to realize improvements in low power consumption, low noise, and analog output path which occupies minimal die area while maintaining certain data rates are disclosed. A two stage pipeline architecture of the invention in the analog output path maintains fast pixel rates with minimal ADC (analog digital converter) arrangement. A novel power supply and the use of differential amplifiers in connection with a black signal level as a reference voltage are also described.

Abstract: The method and apparatus for processing pixel output signals from column lines in an imager having an array of pixels in rows and columns uses a sigma-delta type analog-to-digital converter to convert the output signals on each column line to digital signals and feeding them to a digital signal processor. The converter is monitored to stop sampling of a pixel with the detection of pixel saturation, which is carried out by counting a predetermined number of consecutive zeros in the converted signal. In addition, the next pixel in a column may be controlled to be read with the saturation of the previous pixel, and the next row of pixels may be controlled to be read with the saturation of the pixels in the previous row. Further, sets of a predetermined number of converter output samples are condensed by a decimator into binary numbers of predetermined bit length.

Abstract: The invention is directed to an imaging device and a method of operating the imaging device, which will reduce banding in the image caused by parasitic capacitance. The imaging device comprises an array of pixels arranged in rows and columns and column signal lines adapted to be selectively coupled to the rows of pixels at predetermined times. Each pixel element has a photodetector coupled to a reset switch for receiving a reset signal to reset the photodetector. The imaging device further includes a precharge circuit adapted to place a voltage on the column signal lines. The method of operating the imaging device includes the steps of applying a precharge voltage to the signal lines, resetting the photodetectors in a row, integrating the photodetector voltage as light impinges on the reset photodetectors, coupling the integrated photodetectors to the signal lines, and sampling the integrated voltage coupled to each of the signal lines.