Abstract: A shift register and a method for driving the same, a gate driving circuit and a display device. The shift register includes: an input sub-circuit configured to provide a signal at the signal input terminal to the pull-up node under control of the first clock signal terminal; an output sub-circuit configured to provide a clock signal at the second clock signal terminal to the signal output terminal under control of the pull-up node; and a pull-down sub-circuit configured to provide a signal at the power supply terminal to the signal output terminal under control of the third clock signal terminal.