Patents Assigned to Hejian Technology (Suzhou) Co., Ltd.
  • Patent number: 11127823
    Abstract: A split gate structure is disclosed. The split gate structure includes a first polysilicon, a characteristic oxide, and a second polysilicon sequentially disposed in a trench in a vertical direction upward from a bottom of the trench. An upper surface of the characteristic oxide has a height difference less than 1500 ? between a higher center portion and a lower periphery portion. The split gate structure effectively improves the breakdown performance and the IGSS performance. A power MOS device having the split gate structure and a manufacturing method of the split gate structure are also provided.
    Type: Grant
    Filed: May 14, 2020
    Date of Patent: September 21, 2021
    Assignee: HeJian Technology (Suzhou) Co., Ltd.
    Inventors: Yuan Cheng Zheng, Xin Huan Shi
  • Patent number: 8017027
    Abstract: A semiconductor fabricating process is provided. First, a substrate is provided. The substrate has thereon a stacked structure and a mask layer disposed on the stacked structure. Thereafter, an oxide layer is formed on a surface of the mask layer and a surface of at least a portion of the stacked structure. Afterwards, a first spacer is formed on a sidewall of the stacked structure. Then, a second spacer is formed on a sidewall of the first spacer. Further, a first etching process is performed to remove the oxide layer on the surface of the mask layer. Thereafter, a second etching process is performed to simultaneously remove the mask layer and the second spacer.
    Type: Grant
    Filed: September 2, 2008
    Date of Patent: September 13, 2011
    Assignee: Hejian Technology (Suzhou) Co., Ltd.
    Inventor: Chiu-Te Lee
  • Patent number: 7833817
    Abstract: A method for fabricating an image sensor includes following steps. First, a substrate having semiconductor devices formed thereon is provided. Interlayer insulating films and Interlayer conductive films are formed on the substrate alternately, wherein the interlayer conductive films are electrically connected to the semiconductor devices. Next, isolated photo-diodes are formed on a topmost layer of the interlayer conductive films, wherein one electrode of the isolated photo-diodes is electrically connected to a topmost layer of the interlayer conductive films. A top insulating layer is formed on the topmost layer of the interlayer conductive films, wherein the isolated photo-diodes are covered by the top insulating layer. A top conductive layer is formed in the top insulating layer, wherein the top conductive layer is electrically connected to another electrode of the isolated photo-diodes.
    Type: Grant
    Filed: November 10, 2008
    Date of Patent: November 16, 2010
    Assignee: Hejian Technology (Suzhou) Co., Ltd.
    Inventors: Wenyu Gao, Cedric Lee
  • Publication number: 20100055912
    Abstract: A semiconductor fabricating process is provided. First, a substrate is provided. The substrate has thereon a stacked structure and a mask layer disposed on the stacked structure. Thereafter, an oxide layer is formed on a surface of the mask layer and a surface of at least a portion of the stacked structure. Afterwards, a first spacer is formed on a sidewall of the stacked structure. Then, a second spacer is formed on a sidewall of the first spacer. Further, a first etching process is performed to remove the oxide layer on the surface of the mask layer. Thereafter, a second etching process is performed to simultaneously remove the mask layer and the second spacer.
    Type: Application
    Filed: September 2, 2008
    Publication date: March 4, 2010
    Applicant: HEJIAN TECHNOLOGY (SUZHOU) CO., LTD.
    Inventor: Chiu-Te Lee
  • Publication number: 20090326697
    Abstract: A semiconductor manufacturing automation system for automatically manufacturing a plurality of semiconductor products by using a plurality of tools is provided. The system comprises a database, a receiver module, a data retriever and a data loading module. The database stores a plurality of manufacturing recipes with respect to the semiconductor products respectively. Each of the manufacturing recipes records at least one of the tools for manufacturing the corresponding semiconductor product and a plurality of parameters for controlling each of the tools for manufacturing the corresponding semiconductor product. The receiver module is used for receiving a request for manufacturing one of the semiconductor products. The data retriever is used for retrieving one of the recipes from the database according to the request. The data loading module is used for automatically loading the retrieved recipe to the corresponding tools.
    Type: Application
    Filed: September 10, 2009
    Publication date: December 31, 2009
    Applicant: HEJIAN TECHNOLOGY (SUZHOU) CO., LTD.
    Inventors: Zhe Xu, Ming-Chun Peng
  • Publication number: 20090068786
    Abstract: A method for fabricating an image sensor includes following steps. First, a substrate having semiconductor devices formed thereon is provided. Interlayer insulating films and Interlayer conductive films are formed on the substrate alternately, wherein the interlayer conductive films are electrically connected to the semiconductor devices. Next, isolated photo-diodes are formed on a topmost layer of the interlayer conductive films, wherein one electrode of the isolated photo-diodes is electrically connected to a topmost layer of the interlayer conductive films. A top insulating layer is formed on the topmost layer of the interlayer conductive films, wherein the isolated photo-diodes are covered by the top insulating layer. A top conductive layer is formed in the top insulating layer, wherein the top conductive layer is electrically connected to another electrode of the isolated photo-diodes.
    Type: Application
    Filed: November 10, 2008
    Publication date: March 12, 2009
    Applicant: HEJIAN TECHNOLOGY (SUZHOU) CO., LTD.
    Inventors: Wenyu Gao, Cedric Lee
  • Publication number: 20090059451
    Abstract: In an ESD protection circuit, a MOS transistor and a coupling capacitor are formed over the same substrate. The coupling capacitor may be a MIM capacitor or a PIP capacitor. In case of MIM capacitor, the first metal layer and the second metal layer thereof are electrically coupled to the gate region and the source/drain region of the MOS transistor, respectively. In case of PIP capacitor, the gate region of the MOS transistor, an insulation layer and the second poly layer thereof define the PIP capacitor. The second poly layer of the PIP capacitor is electrically coupled to the source/drain region of the MOS transistor.
    Type: Application
    Filed: September 4, 2007
    Publication date: March 5, 2009
    Applicant: HEJIAN TECHNOLOGY (SUZHOU) CO., LTD.
    Inventors: Jun Shi, Cheng-Lien Wang
  • Patent number: 7482646
    Abstract: An image sensor including a substrate having a plurality of semiconductor devices formed thereon, an interconnection layer disposed on the substrate, and a plurality of isolated photo-diodes embedded in the interconnection layer is provided. The isolated photo-diodes are located above the semiconductor devices and electrically connected to the semiconductor devices through the interconnection layer. In the above-mentioned image sensor, thickness of the interconnection layer is not limited so as to facilitate fabrication of the SOC CMOS image sensor. In addition, the image sensor is advantageous in relatively high fill-factor, layout area saving and easy being implanted. Furthermore, a method for fabricating the image mentioned above is also provided.
    Type: Grant
    Filed: October 18, 2006
    Date of Patent: January 27, 2009
    Assignee: Hejian Technology (Suzhou) Co., Ltd.
    Inventors: Wenyu Gao, Cedric Lee
  • Publication number: 20080120554
    Abstract: A method and system for implementing an electronic frame data management system for semiconductor manufacturing automation including the following steps: data is transferred and stored into a first database, product recipe status of the mask-making data is inspected using a double check UI, the mask-making data via a web page is presented without manual searching, the web page having a desired selection, that is automatically obtained and displayed, is presented, queried results to send out directly is obtained and query capabilities are provided, a product recipe data in an output document format is provided, the data is replicated and stored at the first database to a second database configured at a server, historical record of the user is searched remotely, layer-by-layer accuracy verifications of the input process settings is performed, and only the latest information for the product recipe data is ensured for presentation.
    Type: Application
    Filed: November 17, 2006
    Publication date: May 22, 2008
    Applicant: HEJIAN TECHNOLOGY (SUZHOU) CO., LTD.
    Inventors: Zhe XU, Ming-Chun PENG
  • Publication number: 20080093695
    Abstract: An image sensor including a substrate having a plurality of semiconductor devices formed thereon, an interconnection layer disposed on the substrate, and a plurality of isolated photo-diodes embedded in the interconnection layer is provided. The isolated photo-diodes are located above the semiconductor devices and electrically connected to the semiconductor devices through the interconnection layer. In the above-mentioned image sensor, thickness of the interconnection layer is not limited so as to facilitate fabrication of the SOC CMOS image sensor. In addition, the image sensor is advantageous in relatively high fill-factor, layout area saving and easy being implanted. Furthermore, a method for fabricating the image mentioned above is also provided.
    Type: Application
    Filed: October 18, 2006
    Publication date: April 24, 2008
    Applicant: HEJIAN TECHNOLOGY (SUZHOU) CO., LTD.
    Inventors: Wenyu Gao, Cedric Lee