Abstract: A single-phase AC/DC electric power conversion apparatus includes an indirect matrix converter having an input interface to receive a first alternating current (AC) signal and an output interface to produce a second AC signal, where the first AC signal has a grid frequency. A transformer has a primary winding and an electrically isolated and magnetically coupled secondary winding. A coupling inductor is connected in series between the output interface of the indirect matrix converter and the primary winding. An H-bridge switching arrangement is connected to the secondary winding and produces an output signal having a DC component and at least one AC component. The at least one AC component has a second order harmonic of the grid frequency. An active filter reduces the second order harmonic AC component. A modular conversion apparatus for three-phase power replicates the single-phase apparatus as a module for each phase and omits the active filter.

Abstract: A switching device is controlled by a microprocessor to selectively configure the circuit between a current measurement mode and a calibration mode. When the switch is set to the “on” state, the circuit acts as a normal prior art circuit, with the output Vout being read by the microprocessor to determine the current to the load. However, when the switch is set to the “off” state, a small value resistor (which may be roughly three orders of magnitude greater than Rshunt) connects the inputs of the measuring circuit so that the circuit can generate an output Vout corresponding to the zero load current. By connecting the V+ and V? inputs together with a low resistance resistor, the no-load condition Vdiff=V+?V??0 applies. In this state, the no-load offset can be determined by measuring the output voltage of the circuit without turning off the load.

Abstract: A driver circuit has a gate drive terminal that produces a gate drive signal to control paralleled power semiconductor switches, such as GaN high electron mobility transistor (HEMT) devices. One of the switches is closest to the gate drive terminal such that its gate drive loop inductance is smaller than the remaining switches that are farther away having a larger loop inductance. An additional resistor or gate-source capacitor is provided in the gate drive circuit of the closest switch which increases the total gate resistance of the closest switch compared to the remaining switches, which delays the turn off time of the closest switch. The delay permits zero voltage switching turn-off of the remaining switches to reduce noise. The closest switch is hard switched off but has the smallest loop inductance, which allows optimized turn off.

Abstract: In a multi-phase brushless DC motor, a zero crossing N-bit filter includes a comparator and a phase multiplexer. The phase multiplexer connects each motor phase to each of a positive and a negative input of the comparator, with a switch in each connection to form a switch array. A microprocessor is disposed to operate the switches, and is configured to measure a BEMF for a first phase by opening the switches connecting all other phases to the positive input of the comparator and by opening the switch connecting the first phase being measured to the negative input of said comparator. The comparators output is received by a shift register. The microprocessor is configured to respond to a zero crossing when a majority of bits in the shift register change between high and low.